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feat(parlio_tx): support loop transmission

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This commit is contained in:
Chen Jichang
2025-03-18 16:23:34 +08:00
parent 6474fd67ae
commit 65074afc0d
17 changed files with 292 additions and 66 deletions
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4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@@ -947,6 +947,10 @@ config SOC_PARLIO_TRANS_BIT_ALIGN
bool
default y
config SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION
bool
default y
config SOC_PARLIO_SUPPORT_SLEEP_RETENTION
bool
default y

1
components/soc/esp32h2/include/soc/soc_caps.h
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@@ -374,6 +374,7 @@
#define SOC_PARLIO_RX_CLK_SUPPORT_GATING 1 /*!< Support gating RX clock */
#define SOC_PARLIO_RX_CLK_SUPPORT_OUTPUT 1 /*!< Support output RX clock to a GPIO */
#define SOC_PARLIO_TRANS_BIT_ALIGN 1 /*!< Support bit alignment in transaction */
#define SOC_PARLIO_TX_SUPPORT_LOOP_TRANSMISSION 1 /*!< Support loop transmission. Only avliable in chip version above 1.2 */
#define SOC_PARLIO_SUPPORT_SLEEP_RETENTION 1 /*!< Support back up registers before sleep */
#define SOC_PARLIO_SUPPORT_SPI_LCD 1 /*!< Support to drive SPI interfaced LCD */

10
components/soc/esp32h2/register/soc/parl_io_reg.h
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -186,6 +186,14 @@ extern "C" {
* Parallel TX general configuration register.
*/
#define PARL_IO_TX_GENRL_CFG_REG (DR_REG_PARL_IO_BASE + 0x18)
/** PARL_IO_TX_EOF_GEN_SEL : R/W; bitpos: [13]; default: 0;
* Configures the tx eof generated mechanism. 1'b0: eof generated by data bit length.
* 1'b1: eof generated by DMA eof.
*/
#define PARL_IO_TX_EOF_GEN_SEL (BIT(13))
#define PARL_IO_TX_EOF_GEN_SEL_M (PARL_IO_TX_EOF_GEN_SEL_V << PARL_IO_TX_EOF_GEN_SEL_S)
#define PARL_IO_TX_EOF_GEN_SEL_V 0x00000001U
#define PARL_IO_TX_EOF_GEN_SEL_S 13
/** PARL_IO_TX_IDLE_VALUE : R/W; bitpos: [29:14]; default: 0;
* Configures bus value of transmitter in IDLE state.
*/

9
components/soc/esp32h2/register/soc/parl_io_struct.h
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -179,7 +179,12 @@ typedef union {
*/
typedef union {
struct {
uint32_t reserved_0:14;
uint32_t reserved_0:13;
/** tx_eof_gen_sel : R/W; bitpos: [13]; default: 0;
* Configures the tx eof generated mechanism. 1'b0: eof generated by data bit length.
* 1'b1: eof generated by DMA eof.
*/
uint32_t tx_eof_gen_sel:1;
/** tx_idle_value : R/W; bitpos: [29:14]; default: 0;
* Configures bus value of transmitter in IDLE state.
*/