MMU: Add configurable mmu page size support on ESP32C2

This commit is contained in:
Cao Sen Miao
2022-06-01 10:14:48 +08:00
parent f173016d86
commit 6589daabb9
37 changed files with 153 additions and 132 deletions

View File

@@ -79,13 +79,9 @@ extern "C" {
* valid bit is BIT(8), so value bits are 0xff
*/
#define MMU_VALID_VAL_MASK 0xff
/**
* Helper macro to make a MMU entry invalid
*/
#define INVALID_PHY_PAGE 0xffff
/**
* Max MMU available paddr page num.
* `MMU_MAX_PADDR_PAGE_NUM * MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.:
* `MMU_MAX_PADDR_PAGE_NUM * CONFIG_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.:
* 256 * 64KB, means MMU can support 16MB paddr at most
*/
#define MMU_MAX_PADDR_PAGE_NUM 256