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feat(driver): support acquire/release clock source dependency for all drivers
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@@ -99,6 +99,7 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s
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periph_rtc_dig_clk8m_enable();
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}
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#endif // SOC_TIMER_GROUP_SUPPORT_RC_FAST
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timer->clk_src = src_clk;
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// get clock source frequency
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ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)src_clk, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &counter_src_hz),
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@@ -139,7 +140,6 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s
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}
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#endif // CONFIG_PM_ENABLE
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esp_clk_tree_enable_src((soc_module_clk_t)src_clk, true);
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// !!! HARDWARE SHARED RESOURCE !!!
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// on some ESP chip, different peripheral's clock source setting are mixed in the same register
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// so we need to make this done in an atomic way
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@@ -147,7 +147,6 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s
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timer_ll_set_clock_source(group_id, timer_id, src_clk);
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timer_ll_enable_clock(group_id, timer_id, true);
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}
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timer->clk_src = src_clk;
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uint32_t prescale = counter_src_hz / resolution_hz; // potential resolution loss here
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timer_ll_set_clock_prescale(timer->hal.dev, timer_id, prescale);
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timer->resolution_hz = counter_src_hz / prescale; // this is the real resolution
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