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feat(flash): flash 80M timing tuning on c5

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armando
2025-07-23 15:30:32 +08:00
committed by Armando (Dou Yiwen)
parent 2fbd8779d6
commit 65db12cfa6
6 changed files with 129 additions and 15 deletions
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17
components/hal/esp32c5/include/hal/mspi_ll.h
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@@ -38,7 +38,6 @@ extern "C" {
#define MSPI_LL_CORE_CLOCK_120_MHZ 120
#define MSPI_TIMING_LL_CORE_CLOCK_MHZ_DEFAULT MSPI_LL_CORE_CLOCK_80_MHZ
/*---------------------------------------------------------------
MSPI
---------------------------------------------------------------*/
@@ -59,6 +58,9 @@ static inline __attribute__((always_inline)) void mspi_timing_ll_set_core_clock(
case 120:
divider = 4;
break;
case 240:
divider = 2;
break;
default:
HAL_ASSERT(false);
}
@@ -109,6 +111,19 @@ static inline uint32_t mspi_timing_ll_calculate_clock_reg(uint8_t clkdiv)
return div_parameter;
}
/**
* Clear MSPI hw fifo
*
* @param mspi_id SPI0 / SPI1
*/
__attribute__((always_inline))
static inline void mspi_timing_ll_clear_fifo(uint8_t mspi_id)
{
for (int i = 0; i < 16; i++) {
REG_WRITE(SPI_MEM_W0_REG(mspi_id) + i * 4, 0);
}
}
/*---------------------------------------------------------------
FLASH
---------------------------------------------------------------*/