alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-10-28 20:14:32 +00:00
Code Issues Packages Projects Releases Wiki Activity

spi: remove HSPI macro on esp32c3 and esp32s3

Browse Source
This commit is contained in:
Armando
2021-03-05 16:20:33 +08:00
parent 278cfc2047
commit 670b057b04
32 changed files with 185 additions and 190 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
components/spi_flash/esp_flash_spi_init.c
View File

@@ -65,7 +65,7 @@ __attribute__((unused)) static const char TAG[] = "spi_flash";
//TODO: modify cs hold to meet requirements of all chips!!!
#if CONFIG_IDF_TARGET_ESP32
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
.host_id = SPI_HOST,\
.host_id = SPI1_HOST,\
.speed = DEFAULT_FLASH_SPEED, \
.cs_num = 0, \
.iomux = false, \
@@ -73,7 +73,7 @@ __attribute__((unused)) static const char TAG[] = "spi_flash";
}
#elif CONFIG_IDF_TARGET_ESP32S2
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
.host_id = SPI_HOST,\
.host_id = SPI1_HOST,\
.speed = DEFAULT_FLASH_SPEED, \
.cs_num = 0, \
.iomux = true, \
@@ -82,7 +82,7 @@ __attribute__((unused)) static const char TAG[] = "spi_flash";
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/efuse.h"
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
.host_id = SPI_HOST,\
.host_id = SPI1_HOST,\
.speed = DEFAULT_FLASH_SPEED, \
.cs_num = 0, \
.iomux = true, \
@@ -92,7 +92,7 @@ __attribute__((unused)) static const char TAG[] = "spi_flash";
#include "esp32c3/rom/efuse.h"
#if !CONFIG_SPI_FLASH_AUTO_SUSPEND
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
.host_id = SPI_HOST,\
.host_id = SPI1_HOST,\
.speed = DEFAULT_FLASH_SPEED, \
.cs_num = 0, \
.iomux = true, \
@@ -100,7 +100,7 @@ __attribute__((unused)) static const char TAG[] = "spi_flash";
}
#else
#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
.host_id = SPI_HOST,\
.host_id = SPI1_HOST,\
.speed = DEFAULT_FLASH_SPEED, \
.cs_num = 0, \
.iomux = true, \
@@ -161,7 +161,7 @@ esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_d
esp_err_t ret = ESP_OK;
uint32_t caps = MALLOC_CAP_DEFAULT;
if (config->host_id == SPI_HOST) caps = MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT;
if (config->host_id == SPI1_HOST) caps = MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT;
chip = (esp_flash_t*)heap_caps_malloc(sizeof(esp_flash_t), caps);
if (!chip) {
@@ -193,7 +193,7 @@ esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_d
// When `CONFIG_SPI_FLASH_SHARE_SPI1_BUS` is not enabled on SPI1 bus, the
// `esp_flash_init_os_functions` will not be able to assign a new device ID. In this case, we
// use the `cs_id` in the config structure.
if (dev_id == -1 && config->host_id == SPI_HOST) {
if (dev_id == -1 && config->host_id == SPI1_HOST) {
dev_id = config->cs_id;
}
assert(dev_id < SOC_SPI_PERIPH_CS_NUM(config->host_id) && dev_id >= 0);

4
components/spi_flash/memspi_host_driver.c
View File

@@ -70,7 +70,7 @@ static const spi_flash_host_driver_t esp_flash_gpspi_host = {
esp_err_t memspi_host_init_pointers(memspi_host_inst_t *host, const memspi_host_config_t *cfg)
{
#if SOC_MEMSPI_IS_INDEPENDENT
if (cfg->host_id == SPI_HOST)
if (cfg->host_id == SPI1_HOST)
host->inst.driver = &esp_flash_default_host;
else {
host->inst.driver = &esp_flash_gpspi_host;
@@ -130,7 +130,7 @@ esp_err_t memspi_host_read_status_hs(spi_flash_host_inst_t *host, uint8_t *out_s
esp_err_t memspi_host_flush_cache(spi_flash_host_inst_t *host, uint32_t addr, uint32_t size)
{
if ((void*)((memspi_host_inst_t*)host)->spi == (void*) spi_flash_ll_get_hw(SPI_HOST)) {
if ((void*)((memspi_host_inst_t*)host)->spi == (void*) spi_flash_ll_get_hw(SPI1_HOST)) {
spi_flash_check_and_flush_cache(addr, size);
}
return ESP_OK;

2
components/spi_flash/spi_flash_os_func_app.c
View File

@@ -234,7 +234,7 @@ esp_err_t esp_flash_init_os_functions(esp_flash_t *chip, int host_id, int* out_d
// Skip initializing the bus lock when the bus is SPI1 and the bus is not shared with SPI Master
// driver, leaving dev_handle = NULL
bool skip_register_dev = (host_id == SPI_HOST);
bool skip_register_dev = (host_id == SPI1_HOST);
#if CONFIG_SPI_FLASH_SHARE_SPI1_BUS
skip_register_dev = false;
#endif

16
components/spi_flash/test/test_esp_flash.c
View File

@@ -172,7 +172,7 @@ static const char TAG[] = "test_esp_flash";
{ \
.io_mode = TEST_SPI_READ_MODE,\
.speed = TEST_SPI_SPEED, \
.host_id = SPI_HOST, \
.host_id = SPI1_HOST, \
.cs_id = 1, \
/* the pin which is usually used by the PSRAM */ \
.cs_io_num = SPI1_CS_IO, \
@@ -229,7 +229,7 @@ flashtest_config_t config_list[] = {
{
.io_mode = TEST_SPI_READ_MODE,
.speed = TEST_SPI_SPEED,
.host_id = FSPI_HOST,
.host_id = SPI2_HOST,
.cs_id = 0,
.cs_io_num = FSPI_PIN_NUM_CS,
.input_delay_ns = 0,
@@ -245,7 +245,7 @@ flashtest_config_t config_list[] = {
{
.io_mode = TEST_SPI_READ_MODE,
.speed = TEST_SPI_SPEED,
.host_id = FSPI_HOST,
.host_id = SPI2_HOST,
.cs_id = 0,
.cs_io_num = FSPI_PIN_NUM_CS,
.input_delay_ns = 0,
@@ -258,7 +258,7 @@ static void get_chip_host(esp_flash_t* chip, spi_host_device_t* out_host_id, int
spi_host_device_t host_id;
int cs_id;
if (chip == NULL) {
host_id = SPI_HOST;
host_id = SPI1_HOST;
cs_id = 0;
} else {
spi_flash_hal_context_t* host_data = (spi_flash_hal_context_t*)chip->host;
@@ -275,7 +275,7 @@ static void get_chip_host(esp_flash_t* chip, spi_host_device_t* out_host_id, int
static void setup_bus(spi_host_device_t host_id)
{
if (host_id == SPI_HOST) {
if (host_id == SPI1_HOST) {
ESP_LOGI(TAG, "setup flash on SPI1 CS1...\n");
//no need to initialize the bus, however the CLK may need one more output if it's on the usual place of PSRAM
#ifdef EXTRA_SPI1_CLK_IO
@@ -295,7 +295,7 @@ static void setup_bus(spi_host_device_t host_id)
#endif //!DISABLED_FOR_TARGETS(ESP32)
#if !DISABLED_FOR_TARGETS(ESP32)
} else if (host_id == FSPI_HOST) {
} else if (host_id == SPI2_HOST) {
ESP_LOGI(TAG, "setup flash on SPI%d (FSPI) CS0...\n", host_id + 1);
spi_bus_config_t fspi_bus_cfg = {
.mosi_io_num = FSPI_PIN_NUM_MOSI,
@@ -312,7 +312,7 @@ static void setup_bus(spi_host_device_t host_id)
TEST_ESP_OK(ret);
#endif
//currently the SPI bus for main flash chip is initialized through GPIO matrix
} else if (host_id == HSPI_HOST) {
} else if (host_id == SPI2_HOST) {
ESP_LOGI(TAG, "setup flash on SPI%d (HSPI) CS0...\n", host_id + 1);
spi_bus_config_t hspi_bus_cfg = {
.mosi_io_num = HSPI_PIN_NUM_MOSI,
@@ -1091,7 +1091,7 @@ static void test_flash_read_write_performance(const esp_partition_t *part)
int cs_id;
get_chip_host(chip, &host_id, &cs_id);
if (host_id != SPI_HOST) {
if (host_id != SPI1_HOST) {
// Chips on other SPI buses
CHECK_PERFORMANCE(EXT_);
} else if (cs_id == 0) {