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fix(security): Fixed ESP32S2 memory protection check for Peri1 RTCSLOW interrupt

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- fixes the issue found in https://github.com/espressif/esp-idf/issues/15359
- extends debug printouts in the related tests
This commit is contained in:
Martin Vychodil
2025-02-19 09:42:57 +01:00
parent 0830c08e89
commit 671dc31a32
3 changed files with 19 additions and 7 deletions
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4
components/hal/esp32s2/include/hal/memprot_peri_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -112,7 +112,7 @@ static inline intptr_t memprot_ll_peri1_rtcslow_get_fault_address(void)
static inline bool memprot_ll_peri1_rtcslow_is_intr_mine(void)
{
if (memprot_ll_dram0_is_assoc_intr()) {
if (memprot_ll_peri1_is_assoc_intr()) {
uint32_t faulting_address = (uint32_t)memprot_ll_peri1_rtcslow_get_fault_address();
return faulting_address >= PERI1_RTCSLOW_ADDRESS_LOW && faulting_address <= PERI1_RTCSLOW_ADDRESS_HIGH;
}