alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-09 04:25:32 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'bugfix/riscv_i2c_description' into 'master'

Browse Source 
i2c: fix the controller count in the header description

Closes IDFGH-6476

See merge request espressif/esp-idf!16718
This commit is contained in:
Zim Kalinowski
2022-01-26 03:13:07 +00:00
parent 41761fc762 bb730292d4
commit 67f51a4ce5
10 changed files with 50 additions and 84 deletions
Download Patch File Download Diff File Expand all files Collapse all files

48
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
View File

@@ -47,30 +47,6 @@ config SOC_GPIO_SUPPORT_SLP_SWITCH
bool
default y
config SOC_I2C_NUM
int
default 2
config SOC_I2C_FIFO_LEN
int
default 32
config SOC_I2C_SUPPORT_HW_FSM_RST
bool
default y
config SOC_I2C_SUPPORT_HW_CLR_BUS
bool
default y
config SOC_I2C_SUPPORT_XTAL
bool
default y
config SOC_I2C_SUPPORT_RTC
bool
default y
config SOC_LEDC_SUPPORT_XTAL_CLOCK
bool
default y
@@ -363,6 +339,30 @@ config SOC_DEDIC_GPIO_OUT_AUTO_ENABLE
bool
default y
config SOC_I2C_NUM
int
default 2
config SOC_I2C_FIFO_LEN
int
default 32
config SOC_I2C_SUPPORT_HW_FSM_RST
bool
default y
config SOC_I2C_SUPPORT_HW_CLR_BUS
bool
default y
config SOC_I2C_SUPPORT_XTAL
bool
default y
config SOC_I2C_SUPPORT_RTC
bool
default y
config SOC_I2S_NUM
int
default 2

36
components/soc/esp32s3/include/soc/i2c_caps.h
View File

@@ -1,36 +0,0 @@
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
// ESP32-S3 have 2 I2C.
#define SOC_I2C_NUM (2)
#define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */
//ESP32-S3 support hardware FSM reset
#define SOC_I2C_SUPPORT_HW_FSM_RST (1)
//ESP32-S3 support hardware clear bus
#define SOC_I2C_SUPPORT_HW_CLR_BUS (1)
#define SOC_I2C_SUPPORT_XTAL (1)
#define SOC_I2C_SUPPORT_RTC (1)
#ifdef __cplusplus
}
#endif

13
components/soc/esp32s3/include/soc/soc_caps.h
View File

@@ -123,7 +123,18 @@
#define SOC_DEDIC_GPIO_OUT_AUTO_ENABLE (1) /*!< Dedicated GPIO output attribution is enabled automatically */
/*-------------------------- I2C CAPS ----------------------------------------*/
#include "i2c_caps.h"
// ESP32-S3 has 2 I2C
#define SOC_I2C_NUM (2)
#define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */
//ESP32-S3 support hardware FSM reset
#define SOC_I2C_SUPPORT_HW_FSM_RST (1)
//ESP32-S3 support hardware clear bus
#define SOC_I2C_SUPPORT_HW_CLR_BUS (1)
#define SOC_I2C_SUPPORT_XTAL (1)
#define SOC_I2C_SUPPORT_RTC (1)
/*-------------------------- I2S CAPS ----------------------------------------*/
#define SOC_I2S_NUM (2)