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Merge branch 'feature/optimize_esp32p4_active_power_eco1' into 'master'
feat(system): Optimize esp32p4 active state power consumption Closes PM-103 and IDF-7688 See merge request espressif/esp-idf!32950
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@@ -189,6 +189,30 @@ static inline void _lp_uart_ll_enable_bus_clock(int hw_id, bool enable)
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/// LPPERI.clk_en is a shared register, so this function must be used in an atomic way
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#define lp_uart_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _lp_uart_ll_enable_bus_clock(__VA_ARGS__)
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/**
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* @brief Enable the UART clock.
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*
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* @param hw_id LP UART instance ID
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*/
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FORCE_INLINE_ATTR void lp_uart_ll_sclk_enable(int hw_id)
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{
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(void)hw_id;
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LP_UART.clk_conf.tx_sclk_en = 1;
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LP_UART.clk_conf.rx_sclk_en = 1;
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}
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/**
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* @brief Disable the UART clock.
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*
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* @param hw_id LP UART instance ID
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*/
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FORCE_INLINE_ATTR void lp_uart_ll_sclk_disable(int hw_id)
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{
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(void)hw_id;
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LP_UART.clk_conf.tx_sclk_en = 0;
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LP_UART.clk_conf.rx_sclk_en = 0;
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}
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/**
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* @brief Reset LP UART module
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*
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@@ -875,6 +899,17 @@ FORCE_INLINE_ATTR void uart_ll_set_wakeup_thrd(uart_dev_t *hw, uint32_t wakeup_t
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hw->sleep_conf2.active_threshold = wakeup_thrd - UART_LL_MIN_WAKEUP_THRESH;
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}
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/**
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* @brief Enable/disable the UART pad clock in sleep_state
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*
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* @param hw Beginning address of the peripheral registers.
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* @param enable enable or disable
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*/
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FORCE_INLINE_ATTR void uart_ll_enable_pad_sleep_clock(uart_dev_t *hw, bool enable)
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{
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(void)hw; (void)enable;
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}
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/**
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* @brief Configure the UART work in normal mode.
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*
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