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fix(i2c_master): Fix an I2C issue that slave streth happen but master timeout set seems doesn't work
Closes https://github.com/espressif/esp-idf/issues/14129 Closes https://github.com/espressif/esp-idf/issues/14401
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@@ -671,7 +671,7 @@ static inline void i2c_ll_get_stop_timing(i2c_dev_t *hw, int *setup_time, int *h
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*
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* @param hw Beginning address of the peripheral registers
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* @param ptr Pointer to data buffer
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* @param len Amount of data needs to be writen
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* @param len Amount of data needs to be written
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*
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* @return None.
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*/
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@@ -706,7 +706,7 @@ static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len)
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* @param hw Beginning address of the peripheral registers
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* @param ram_offset Offset value of I2C RAM.
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* @param ptr Pointer to data buffer
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* @param len Amount of data needs to be writen
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* @param len Amount of data needs to be written
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*/
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static inline void i2c_ll_write_by_nonfifo(i2c_dev_t *hw, uint8_t ram_offset, const uint8_t *ptr, uint8_t len)
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{
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@@ -778,7 +778,7 @@ static inline void i2c_ll_master_get_filter(i2c_dev_t *hw, uint8_t *filter_conf)
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}
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/**
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* @brief Reste I2C master FSM. When the master FSM is stuck, call this function to reset the FSM
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* @brief reset I2C master FSM. When the master FSM is stuck, call this function to reset the FSM
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*
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* @param hw Beginning address of the peripheral registers
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*
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@@ -917,7 +917,8 @@ static inline void i2c_ll_slave_clear_stretch(i2c_dev_t *dev)
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static inline uint32_t i2c_ll_calculate_timeout_us_to_reg_val(uint32_t src_clk_hz, uint32_t timeout_us)
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{
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uint32_t clk_cycle_num_per_us = src_clk_hz / (1 * 1000 * 1000);
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return 31 - __builtin_clz(clk_cycle_num_per_us * timeout_us);
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// round up to an integer
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return 32 - __builtin_clz(clk_cycle_num_per_us * timeout_us);
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}
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//////////////////////////////////////////Deprecated Functions//////////////////////////////////////////////////////////
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@@ -972,7 +973,7 @@ static inline void i2c_ll_get_scl_clk_timing(i2c_dev_t *hw, int *high_period, in
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* @brief Configure I2C SCL timing
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*
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* @param hw Beginning address of the peripheral registers
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* @param high_period The I2C SCL hight period (in core clock cycle, hight_period > 2)
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* @param high_period The I2C SCL height period (in core clock cycle, hight_period > 2)
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* @param low_period The I2C SCL low period (in core clock cycle, low_period > 1)
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* @param wait_high_period The I2C SCL wait rising edge period.
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*
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@@ -1143,7 +1144,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw)
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* @brief Configure I2C SCL timing
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*
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* @param hw Beginning address of the peripheral registers
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* @param high_period The I2C SCL hight period (in core clock cycle, hight_period > 2)
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* @param high_period The I2C SCL height period (in core clock cycle, hight_period > 2)
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* @param low_period The I2C SCL low period (in core clock cycle, low_period > 1)
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*
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* @return None.
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