Merge branch 'fix/crypto_periphs_use_rcc_atomic_blocks' into 'master'

Use rcc atomic blocks to enable/reset crypto peripherals

See merge request espressif/esp-idf!25811
This commit is contained in:
Mahavir Jain
2023-10-13 22:37:58 +08:00
34 changed files with 821 additions and 63 deletions

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@@ -17,6 +17,7 @@
#include "soc/hwcrypto_reg.h"
#include "soc/soc_caps.h"
#include "soc/pcr_struct.h"
#include "hal/ds_types.h"
@@ -24,6 +25,25 @@
extern "C" {
#endif
/**
* @brief Enable the bus clock for Digital Signature peripheral module
*
* @param true to enable the module, false to disable the module
*/
static inline void ds_ll_enable_bus_clock(bool enable)
{
PCR.ds_conf.ds_clk_en = enable;
}
/**
* @brief Reset the Digital Signature peripheral module
*/
static inline void ds_ll_reset_register(void)
{
PCR.ds_conf.ds_rst_en = 1;
PCR.ds_conf.ds_rst_en = 0;
}
static inline void ds_ll_start(void)
{
REG_WRITE(DS_SET_START_REG, 1);

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -10,6 +10,7 @@
#include "hal/assert.h"
#include "hal/ecc_types.h"
#include "soc/ecc_mult_reg.h"
#include "soc/pcr_struct.h"
#ifdef __cplusplus
extern "C" {
@@ -21,6 +22,25 @@ typedef enum {
ECC_PARAM_K,
} ecc_ll_param_t;
/**
* @brief Enable the bus clock for ECC peripheral module
*
* @param true to enable the module, false to disable the module
*/
static inline void ecc_ll_enable_bus_clock(bool enable)
{
PCR.ecc_conf.ecc_clk_en = enable;
}
/**
* @brief Reset the ECC peripheral module
*/
static inline void ecc_ll_reset_register(void)
{
PCR.ecc_conf.ecc_rst_en = 1;
PCR.ecc_conf.ecc_rst_en = 0;
}
static inline void ecc_ll_enable_interrupt(void)
{
REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

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@@ -13,9 +13,11 @@
#pragma once
#include <string.h>
#include <stdbool.h>
#include "soc/system_reg.h"
#include "soc/hwcrypto_reg.h"
#include "soc/pcr_struct.h"
#include "hal/hmac_types.h"
#define SHA256_BLOCK_SZ 64
@@ -30,6 +32,25 @@
extern "C" {
#endif
/**
* @brief Enable the bus clock for HMAC peripheral module
*
* @param true to enable the module, false to disable the module
*/
static inline void hmac_ll_enable_bus_clock(bool enable)
{
PCR.hmac_conf.hmac_clk_en = enable;
}
/**
* @brief Reset the HMAC peripheral module
*/
static inline void hmac_ll_reset_register(void)
{
PCR.hmac_conf.hmac_rst_en = 1;
PCR.hmac_conf.hmac_rst_en = 0;
}
/**
* Makes the peripheral ready for use, after enabling it.
*/

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@@ -11,6 +11,7 @@
#include "hal/assert.h"
#include "hal/mpi_types.h"
#include "soc/pcr_reg.h"
#include "soc/pcr_struct.h"
#include "soc/rsa_reg.h"
#include "soc/mpi_periph.h"
@@ -19,6 +20,28 @@ extern "C" {
#endif
/**
* @brief Enable the bus clock for MPI peripheral module
*
* @param enable true to enable the module, false to disable the module
*/
static inline void mpi_ll_enable_bus_clock(bool enable)
{
PCR.rsa_conf.rsa_clk_en = enable;
}
/**
* @brief Reset the MPI peripheral module
*/
static inline void mpi_ll_reset_register(void)
{
PCR.rsa_conf.rsa_rst_en = 1;
PCR.rsa_conf.rsa_rst_en = 0;
// Clear reset on digital signature also, otherwise RSA is held in reset
PCR.ds_conf.ds_rst_en = 0;
}
static inline size_t mpi_ll_calculate_hardware_words(size_t words)
{
return words;