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feat(uart): add DTR and DSR signals support for UART

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This commit is contained in:
Song Ruo Jing
2025-07-10 19:33:04 +08:00
parent b59bc28553
commit 6bfdc93593
40 changed files with 1020 additions and 345 deletions
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136
components/soc/esp32p4/uart_periph.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -15,33 +15,47 @@ const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM] = {
{
// HP UART0
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U0TXD_GPIO_NUM,
.iomux_func = U0TXD_MUX_FUNC,
.input = 0,
.signal = UART0_TXD_PAD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U0RXD_GPIO_NUM,
.iomux_func = U0RXD_MUX_FUNC,
.input = 1,
.signal = UART0_RXD_PAD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U0RTS_GPIO_NUM,
.iomux_func = U0RTS_MUX_FUNC,
.input = 0,
.signal = UART0_RTS_PAD_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U0CTS_GPIO_NUM,
.iomux_func = U0CTS_MUX_FUNC,
.input = 1,
.signal = UART0_CTS_PAD_IN_IDX,
}
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U0DTR_GPIO_NUM,
.iomux_func = U0DTR_MUX_FUNC,
.input = 0,
.signal = UART0_DTR_PAD_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U0DSR_GPIO_NUM,
.iomux_func = U0DSR_MUX_FUNC,
.input = 1,
.signal = UART0_DSR_PAD_IN_IDX,
},
},
.irq = ETS_UART0_INTR_SOURCE,
},
@@ -49,33 +63,47 @@ const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM] = {
{
// HP UART1
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U1TXD_GPIO_NUM,
.iomux_func = U1TXD_MUX_FUNC,
.input = 0,
.signal = UART1_TXD_PAD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U1RXD_GPIO_NUM,
.iomux_func = U1RXD_MUX_FUNC,
.input = 1,
.signal = UART1_RXD_PAD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U1RTS_GPIO_NUM,
.iomux_func = U1RTS_MUX_FUNC,
.input = 0,
.signal = UART1_RTS_PAD_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U1CTS_GPIO_NUM,
.iomux_func = U1CTS_MUX_FUNC,
.input = 1,
.signal = UART1_CTS_PAD_IN_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U1DTR_GPIO_NUM,
.iomux_func = U1DTR_MUX_FUNC,
.input = 0,
.signal = UART1_DTR_PAD_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U1DSR_GPIO_NUM,
.iomux_func = U1DSR_MUX_FUNC,
.input = 1,
.signal = UART1_DSR_PAD_IN_IDX,
},
},
.irq = ETS_UART1_INTR_SOURCE,
},
@@ -83,33 +111,47 @@ const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM] = {
{
// HP UART2
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U2TXD_GPIO_NUM,
.iomux_func = U2TXD_MUX_FUNC,
.input = 0,
.signal = UART2_TXD_PAD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U2RXD_GPIO_NUM,
.iomux_func = U2RXD_MUX_FUNC,
.input = 1,
.signal = UART2_RXD_PAD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U2RTS_GPIO_NUM,
.iomux_func = U2RTS_MUX_FUNC,
.input = 0,
.signal = UART2_RTS_PAD_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U2CTS_GPIO_NUM,
.iomux_func = U2CTS_MUX_FUNC,
.input = 1,
.signal = UART2_CTS_PAD_IN_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U2DTR_GPIO_NUM,
.iomux_func = U2DTR_MUX_FUNC,
.input = 0,
.signal = UART2_DTR_PAD_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U2DSR_GPIO_NUM,
.iomux_func = U2DSR_MUX_FUNC,
.input = 1,
.signal = UART2_DSR_PAD_IN_IDX,
},
},
.irq = ETS_UART2_INTR_SOURCE,
},
@@ -117,33 +159,47 @@ const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM] = {
{
// HP UART3
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U3TXD_GPIO_NUM,
.iomux_func = U3TXD_MUX_FUNC,
.input = 0,
.signal = UART3_TXD_PAD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U3RXD_GPIO_NUM,
.iomux_func = U3RXD_MUX_FUNC,
.input = 1,
.signal = UART3_RXD_PAD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U3RTS_GPIO_NUM,
.iomux_func = U3RTS_MUX_FUNC,
.input = 0,
.signal = UART3_RTS_PAD_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U3CTS_GPIO_NUM,
.iomux_func = U3CTS_MUX_FUNC,
.input = 1,
.signal = UART3_CTS_PAD_IN_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U3DTR_GPIO_NUM,
.iomux_func = U3DTR_MUX_FUNC,
.input = 0,
.signal = UART3_DTR_PAD_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U3DSR_GPIO_NUM,
.iomux_func = U3DSR_MUX_FUNC,
.input = 1,
.signal = UART3_DSR_PAD_IN_IDX,
},
},
.irq = ETS_UART3_INTR_SOURCE,
},
@@ -151,66 +207,94 @@ const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM] = {
{
// HP UART4
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U4TXD_GPIO_NUM,
.iomux_func = U4TXD_MUX_FUNC,
.input = 0,
.signal = UART4_TXD_PAD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U4RXD_GPIO_NUM,
.iomux_func = U4RXD_MUX_FUNC,
.input = 1,
.signal = UART4_RXD_PAD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U4RTS_GPIO_NUM,
.iomux_func = U4RTS_MUX_FUNC,
.input = 0,
.signal = UART4_RTS_PAD_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U4CTS_GPIO_NUM,
.iomux_func = U4CTS_MUX_FUNC,
.input = 1,
.signal = UART4_CTS_PAD_IN_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U4DTR_GPIO_NUM,
.iomux_func = U4DTR_MUX_FUNC,
.input = 0,
.signal = UART4_DTR_PAD_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U4DSR_GPIO_NUM,
.iomux_func = U4DSR_MUX_FUNC,
.input = 1,
.signal = UART4_DSR_PAD_IN_IDX,
},
},
.irq = ETS_UART4_INTR_SOURCE,
},
{
// LP UART0
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = LP_U0TXD_GPIO_NUM,
.iomux_func = LP_U0TXD_MUX_FUNC,
.input = 0,
.signal = LP_UART_TXD_PAD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = LP_U0RXD_GPIO_NUM,
.iomux_func = LP_U0RXD_MUX_FUNC,
.input = 1,
.signal = LP_UART_RXD_PAD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = LP_U0RTS_GPIO_NUM,
.iomux_func = LP_U0RTS_MUX_FUNC,
.input = 0,
.signal = LP_UART_RTSN_PAD_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = LP_U0CTS_GPIO_NUM,
.iomux_func = LP_U0CTS_MUX_FUNC,
.input = 1,
.signal = LP_UART_CTSN_PAD_IN_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = LP_U0DTR_GPIO_NUM,
.iomux_func = LP_U0DTR_MUX_FUNC,
.input = 0,
.signal = LP_UART_DTRN_PAD_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = LP_U0DSR_GPIO_NUM,
.iomux_func = LP_U0DSR_MUX_FUNC,
.input = 1,
.signal = LP_UART_DSRN_PAD_IN_IDX,
},
},
.irq = ETS_LP_UART_INTR_SOURCE,
},