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feat(uart): add DTR and DSR signals support for UART

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This commit is contained in:
Song Ruo Jing
2025-07-10 19:33:04 +08:00
parent b59bc28553
commit 6bfdc93593
40 changed files with 1020 additions and 345 deletions
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72
components/soc/esp32s3/uart_periph.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -12,99 +12,141 @@
const uart_signal_conn_t uart_periph_signal[SOC_UART_NUM] = {
{
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U0TXD_GPIO_NUM,
.iomux_func = U0TXD_MUX_FUNC,
.input = 0,
.signal = U0TXD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U0RXD_GPIO_NUM,
.iomux_func = U0RXD_MUX_FUNC,
.input = 1,
.signal = U0RXD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U0RTS_GPIO_NUM,
.iomux_func = U0RTS_MUX_FUNC,
.input = 0,
.signal = U0RTS_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U0CTS_GPIO_NUM,
.iomux_func = U0CTS_MUX_FUNC,
.input = 1,
.signal = U0CTS_IN_IDX,
}
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U0DTR_GPIO_NUM,
.iomux_func = U0DTR_MUX_FUNC,
.input = 0,
.signal = U0DTR_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U0DSR_GPIO_NUM,
.iomux_func = U0DSR_MUX_FUNC,
.input = 1,
.signal = U0DSR_IN_IDX,
},
},
.irq = ETS_UART0_INTR_SOURCE,
},
{
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U1TXD_GPIO_NUM,
.iomux_func = U1TXD_MUX_FUNC,
.input = 0,
.signal = U1TXD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U1RXD_GPIO_NUM,
.iomux_func = U1RXD_MUX_FUNC,
.input = 1,
.signal = U1RXD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U1RTS_GPIO_NUM,
.iomux_func = U1RTS_MUX_FUNC,
.input = 0,
.signal = U1RTS_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U1CTS_GPIO_NUM,
.iomux_func = U1CTS_MUX_FUNC,
.input = 1,
.signal = U1CTS_IN_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U1DTR_GPIO_NUM,
.iomux_func = U1DTR_MUX_FUNC,
.input = 0,
.signal = U1DTR_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U1DSR_GPIO_NUM,
.iomux_func = U1DSR_MUX_FUNC,
.input = 1,
.signal = U1DSR_IN_IDX,
},
},
.irq = ETS_UART1_INTR_SOURCE,
},
{
.pins = {
[SOC_UART_TX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_TX] = {
.default_gpio = U2TXD_GPIO_NUM,
.iomux_func = U2TXD_MUX_FUNC,
.input = 0,
.signal = U2TXD_OUT_IDX,
},
[SOC_UART_RX_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RX] = {
.default_gpio = U2RXD_GPIO_NUM,
.iomux_func = U2RXD_MUX_FUNC,
.input = 1,
.signal = U2RXD_IN_IDX,
},
[SOC_UART_RTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_RTS] = {
.default_gpio = U2RTS_GPIO_NUM,
.iomux_func = U2RTS_MUX_FUNC,
.input = 0,
.signal = U2RTS_OUT_IDX,
},
[SOC_UART_CTS_PIN_IDX] = {
[SOC_UART_PERIPH_SIGNAL_CTS] = {
.default_gpio = U2CTS_GPIO_NUM,
.iomux_func = U2CTS_MUX_FUNC,
.input = 1,
.signal = U2CTS_IN_IDX,
}
},
[SOC_UART_PERIPH_SIGNAL_DTR] = {
.default_gpio = U2DTR_GPIO_NUM,
.iomux_func = U2DTR_MUX_FUNC,
.input = 0,
.signal = U2DTR_OUT_IDX,
},
[SOC_UART_PERIPH_SIGNAL_DSR] = {
.default_gpio = U2DSR_GPIO_NUM,
.iomux_func = U2DSR_MUX_FUNC,
.input = 1,
.signal = U2DSR_IN_IDX,
},
},
.irq = ETS_UART2_INTR_SOURCE,
}