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feat(esp_hw_support): enable auto clock gating for multi peripherals
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@@ -494,6 +494,22 @@ static inline uint32_t adc_ll_pwdet_get_cct(void)
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Common setting
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---------------------------------------------------------------*/
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static inline void _adc_ll_sar1_clock_force_en(bool enable)
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{
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HP_SYS_CLKRST.clk_force_on_ctrl0.reg_sar1_clk_force_on = enable;
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}
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// HP_SYS_CLKRST.clk_force_on_ctrl0 are shared registers, so this function must be used in an atomic way
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#define adc_ll_sar1_clock_force_en(...) (void)__DECLARE_RCC_ATOMIC_ENV; _adc_ll_sar1_clock_force_en(__VA_ARGS__)
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static inline void _adc_ll_sar2_clock_force_en(bool enable)
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{
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HP_SYS_CLKRST.clk_force_on_ctrl0.reg_sar2_clk_force_on = enable;
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}
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// HP_SYS_CLKRST.clk_force_on_ctrl0 are shared registers, so this function must be used in an atomic way
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#define adc_ll_sar2_clock_force_en(...) (void)__DECLARE_RCC_ATOMIC_ENV; _adc_ll_sar2_clock_force_en(__VA_ARGS__)
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/**
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* @brief Enable the ADC clock
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* @param enable true to enable, false to disable
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