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1. open glitch reset for c3 ECO3;

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2. set digital & rtc voltage to about 1.15v which storing in efuse.
This commit is contained in:
chaijie
2021-04-28 21:51:22 +08:00
committed by sly
parent a4a7e7b3e9
commit 6d2bdfc5f5
8 changed files with 186 additions and 55 deletions
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9
components/soc/esp32c3/include/soc/rtc.h
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@@ -122,6 +122,15 @@ set sleep_init default param
#define RTC_CNTL_PD_CUR_SLEEP_DEFAULT 1
#define RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT 254
/*
The follow value is used to get a reasonable rtc voltage dbias value according to digital dbias & some other value
storing in efuse (based on ATE 5k ECO3 chips)
*/
#define K_RTC_MID_MUL10000 215
#define K_DIG_MID_MUL10000 213
#define V_RTC_MID_MUL10000 10800
#define V_DIG_MID_MUL10000 10860
/**
* @brief Possible main XTAL frequency values.
*