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feat(adc): move adc periph enable/reset functions to ll layer

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This commit is contained in:
gaoxu
2024-03-28 15:19:45 +08:00
committed by Gao Xu
parent c1edeca849
commit 6d82c324bb
14 changed files with 209 additions and 46 deletions
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24
components/hal/esp32c3/include/hal/adc_ll.h
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@@ -15,6 +15,7 @@
#include "soc/rtc_cntl_struct.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/clk_tree_defs.h"
#include "soc/system_struct.h"
#include "hal/misc.h"
#include "hal/assert.h"
#include "hal/adc_types.h"
@@ -560,6 +561,29 @@ static inline uint32_t adc_ll_pwdet_get_cct(void)
/*---------------------------------------------------------------
Common setting
---------------------------------------------------------------*/
/**
* @brief Enable the ADC clock
* @param enable true to enable, false to disable
*/
static inline void adc_ll_enable_bus_clock(bool enable)
{
SYSTEM.perip_clk_en0.reg_apb_saradc_clk_en = enable;
}
// SYSTEM.perip_clk_en0 is a shared register, so this function must be used in an atomic way
#define adc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; adc_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset ADC module
*/
static inline void adc_ll_reset_register(void)
{
SYSTEM.perip_rst_en0.reg_apb_saradc_rst = 1;
SYSTEM.perip_rst_en0.reg_apb_saradc_rst = 0;
}
// SYSTEM.perip_rst_en0 is a shared register, so this function must be used in an atomic way
#define adc_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; adc_ll_reset_register(__VA_ARGS__)
/**
* Set ADC module power management.
*