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Merge branch 'fix/rmii_ref_ckl' into 'master'
fix(esp_eth): fixed ESP32P4 EMAC REF RMII CLK output mode See merge request espressif/esp-idf!37138
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -88,6 +88,19 @@ FORCE_INLINE_ATTR void _clk_gate_ll_xtal_to_lp_periph_en(bool enable)
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define clk_gate_ll_xtal_to_lp_periph_en(...) (void)__DECLARE_RCC_ATOMIC_ENV; _clk_gate_ll_xtal_to_lp_periph_en(__VA_ARGS__)
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/**
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* Enable or disable the clock gate for ref_50m.
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* @param enable Enable / disable
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*/
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FORCE_INLINE_ATTR void _clk_gate_ll_ref_50m_clk_en(bool enable)
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{
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HP_SYS_CLKRST.ref_clk_ctrl1.reg_ref_50m_clk_en = enable;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define clk_gate_ll_ref_50m_clk_en(...) (void)__DECLARE_RCC_ATOMIC_ENV; _clk_gate_ll_ref_50m_clk_en(__VA_ARGS__)
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#ifdef __cplusplus
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}
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#endif
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@@ -907,7 +907,7 @@ static inline void emac_ll_clock_enable_ptp(void *ext_regs, soc_periph_emac_ptp_
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static inline void emac_ll_pause_frame_enable(void *ext_regs, bool enable)
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{
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HP_SYSTEM.sys_gmac_ctrl0.sys_phy_intf_sel = enable;
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HP_SYSTEM.sys_gmac_ctrl0.sys_sbd_flowctrl = enable;
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}
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#ifdef __cplusplus
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