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feature(psram): add support for 64MBit psram of 1.8v and 3.3v.
1. Add reading psram EID. 2. Configure different clock mode for different EID. 3. add API to get psram size and voltage. 4. Remove unnecessary VSPI claim. For 32MBit@1.8V and 64MBit@3.3V psram, there should be 2 extra clock cycles after CS get high level. For 64MBit@1.8 psram, we can just use standard SPI protocol to drive the psram. We also need to increase the HOLD time for CS in this case. EID for psram: 32MBit 1.8v: 0x20 64MBit 1.8v: 0x26 64MBit 3.3v: 0x46
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@@ -23,6 +23,7 @@ we add more types of external RAM memory, this can be made into a more intellige
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "esp_spiram.h"
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#include "spiram_psram.h"
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#include "esp_log.h"
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#include "freertos/FreeRTOS.h"
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@@ -102,6 +103,39 @@ void IRAM_ATTR esp_spiram_init_cache()
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#endif
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}
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esp_spiram_volt_t esp_spiram_get_chip_volt()
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{
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if (!spiram_inited) {
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ESP_LOGE(TAG, "SPI RAM not initialized");
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return ESP_SPIRAM_VOLT_INVALID;
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}
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psram_volt_t volt = psram_get_volt();
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switch (volt) {
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case PSRAM_VOLT_1V8:
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return ESP_SPIRAM_VOLT_1V8;
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case PSRAM_VOLT_3V3:
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return ESP_SPIRAM_VOLT_3V3;
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default:
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return ESP_SPIRAM_VOLT_INVALID;
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}
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}
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esp_spiram_size_t esp_spiram_get_chip_size()
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{
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if (!spiram_inited) {
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ESP_LOGE(TAG, "SPI RAM not initialized");
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return ESP_SPIRAM_SIZE_INVALID;
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}
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psram_size_t psram_size = psram_get_size();
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switch (psram_size) {
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case PSRAM_SIZE_32MBITS:
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return ESP_SPIRAM_SIZE_32MBITS;
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case PSRAM_SIZE_64MBITS:
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return ESP_SPIRAM_SIZE_64MBITS;
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default:
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return ESP_SPIRAM_SIZE_INVALID;
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}
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}
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esp_err_t esp_spiram_init()
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{
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