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Merge branch 'refactor/remove_redundant_rom_cache_dependency' into 'master'
cache: remove redundant rom cache dependency in bootloader Closes IDF-4523 See merge request espressif/esp-idf!17077
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@@ -79,10 +79,6 @@ config SOC_EFUSE_KEY_PURPOSE_FIELD
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bool
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default y
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config SOC_ICACHE_ACCESS_RODATA_SUPPORTED
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bool
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default y
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config SOC_TEMP_SENSOR_SUPPORTED
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bool
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default y
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@@ -6,6 +6,8 @@
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#ifndef _CACHE_MEMORY_H_
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#define _CACHE_MEMORY_H_
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#include "esp_bit_defs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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@@ -93,6 +95,7 @@ extern "C" {
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#define MMU_BUS_SIZE 0x100
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#define MMU_INVALID BIT(14)
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#define MMU_VALID 0
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#define MMU_ACCESS_FLASH BIT(15)
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#define MMU_ACCESS_SPIRAM BIT(16)
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@@ -101,11 +104,23 @@ extern "C" {
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#define MMU_TABLE_INVALID_VAL 0x4000
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#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
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#define MMU_ADDRESS_MASK 0x3fff
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#define MMU_PAGE_SIZE 0x10000
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#define BUS_ADDR_SIZE 0x400000
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#define BUS_ADDR_MASK (BUS_ADDR_SIZE - 1)
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/**
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* MMU entry valid bit mask for mapping value. For an entry:
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* valid bit + value bits
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* valid bit is BIT(14), so value bits are 0x3fff
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*/
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#define MMU_VALID_VAL_MASK 0x3fff
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/**
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* Max MMU entry num.
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* `MMU_MAX_ENTRY_NUM * MMU_PAGE_SIZE` means the max paddr and vaddr region supported by the MMU. e.g.:
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* 16384 * 64KB, means MMU can map 1GB at most
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*/
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#define MMU_MAX_ENTRY_NUM 16384
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/**
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* This is the mask used for mapping. e.g.:
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* 0x4200_0000 & MMU_VADDR_MASK
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*/
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#define MMU_VADDR_MASK 0x3FFFFF
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#define BUS_NUM_MASK 0x3
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#define CACHE_MEMORY_BANK_SIZE 8192
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@@ -1,20 +1,12 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "soc/cache_memory.h"
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#include "soc/ext_mem_defs.h"
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#include "soc/soc.h"
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#ifdef __cplusplus
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@@ -29,7 +21,7 @@ extern "C" {
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#define SOC_MMU_DROM0_PAGES_START (PRO_CACHE_IBUS2_MMU_START / sizeof(uint32_t))
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#define SOC_MMU_DROM0_PAGES_END (PRO_CACHE_IBUS2_MMU_END / sizeof(uint32_t))
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#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
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#define SOC_MMU_ADDR_MASK MMU_ADDRESS_MASK
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#define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
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#define SOC_MMU_PAGE_IN_FLASH(page) ((page) | MMU_ACCESS_FLASH)
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#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
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#define SOC_MMU_VADDR1_START_ADDR SOC_IROM_MASK_LOW
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@@ -58,7 +58,6 @@
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#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
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#define SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS 1
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#define SOC_EFUSE_KEY_PURPOSE_FIELD 1
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#define SOC_ICACHE_ACCESS_RODATA_SUPPORTED 1
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#define SOC_TEMP_SENSOR_SUPPORTED 1
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#define SOC_CACHE_SUPPORT_WRAP 1
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#define SOC_FLASH_ENCRYPTION_XTS_AES 1
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