Merge branch 'refactor/remove_redundant_rom_cache_dependency' into 'master'

cache: remove redundant rom cache dependency in bootloader

Closes IDF-4523

See merge request espressif/esp-idf!17077
This commit is contained in:
Armando (Dou Yiwen)
2022-03-12 10:11:39 +08:00
70 changed files with 2314 additions and 466 deletions

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@@ -79,10 +79,6 @@ config SOC_EFUSE_KEY_PURPOSE_FIELD
bool
default y
config SOC_ICACHE_ACCESS_RODATA_SUPPORTED
bool
default y
config SOC_TEMP_SENSOR_SUPPORTED
bool
default y

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@@ -6,6 +6,8 @@
#ifndef _CACHE_MEMORY_H_
#define _CACHE_MEMORY_H_
#include "esp_bit_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
@@ -93,6 +95,7 @@ extern "C" {
#define MMU_BUS_SIZE 0x100
#define MMU_INVALID BIT(14)
#define MMU_VALID 0
#define MMU_ACCESS_FLASH BIT(15)
#define MMU_ACCESS_SPIRAM BIT(16)
@@ -101,11 +104,23 @@ extern "C" {
#define MMU_TABLE_INVALID_VAL 0x4000
#define FLASH_MMU_TABLE_INVALID_VAL DPORT_MMU_TABLE_INVALID_VAL
#define MMU_ADDRESS_MASK 0x3fff
#define MMU_PAGE_SIZE 0x10000
#define BUS_ADDR_SIZE 0x400000
#define BUS_ADDR_MASK (BUS_ADDR_SIZE - 1)
/**
* MMU entry valid bit mask for mapping value. For an entry:
* valid bit + value bits
* valid bit is BIT(14), so value bits are 0x3fff
*/
#define MMU_VALID_VAL_MASK 0x3fff
/**
* Max MMU entry num.
* `MMU_MAX_ENTRY_NUM * MMU_PAGE_SIZE` means the max paddr and vaddr region supported by the MMU. e.g.:
* 16384 * 64KB, means MMU can map 1GB at most
*/
#define MMU_MAX_ENTRY_NUM 16384
/**
* This is the mask used for mapping. e.g.:
* 0x4200_0000 & MMU_VADDR_MASK
*/
#define MMU_VADDR_MASK 0x3FFFFF
#define BUS_NUM_MASK 0x3
#define CACHE_MEMORY_BANK_SIZE 8192

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@@ -1,20 +1,12 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include "soc/cache_memory.h"
#include "soc/ext_mem_defs.h"
#include "soc/soc.h"
#ifdef __cplusplus
@@ -29,7 +21,7 @@ extern "C" {
#define SOC_MMU_DROM0_PAGES_START (PRO_CACHE_IBUS2_MMU_START / sizeof(uint32_t))
#define SOC_MMU_DROM0_PAGES_END (PRO_CACHE_IBUS2_MMU_END / sizeof(uint32_t))
#define SOC_MMU_INVALID_ENTRY_VAL MMU_TABLE_INVALID_VAL
#define SOC_MMU_ADDR_MASK MMU_ADDRESS_MASK
#define SOC_MMU_ADDR_MASK MMU_VALID_VAL_MASK
#define SOC_MMU_PAGE_IN_FLASH(page) ((page) | MMU_ACCESS_FLASH)
#define SOC_MMU_DPORT_PRO_FLASH_MMU_TABLE FLASH_MMU_TABLE
#define SOC_MMU_VADDR1_START_ADDR SOC_IROM_MASK_LOW

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@@ -58,7 +58,6 @@
#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
#define SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS 1
#define SOC_EFUSE_KEY_PURPOSE_FIELD 1
#define SOC_ICACHE_ACCESS_RODATA_SUPPORTED 1
#define SOC_TEMP_SENSOR_SUPPORTED 1
#define SOC_CACHE_SUPPORT_WRAP 1
#define SOC_FLASH_ENCRYPTION_XTS_AES 1