mirror of
https://github.com/espressif/esp-idf.git
synced 2025-10-01 11:26:15 +00:00
i2c: Add supports on esp32s3
This commit is contained in:
Cao Sen Miao
@@ -1,4 +1,4 @@
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// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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@@ -22,41 +22,43 @@ extern "C" {
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typedef volatile struct {
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union {
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struct {
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uint32_t period: 14;
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uint32_t reserved14: 18;
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uint32_t period: 9;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} scl_low_period;
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union {
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struct {
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uint32_t sda_force_out: 1;
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uint32_t scl_force_out: 1;
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uint32_t sample_scl_level: 1;
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uint32_t ack_level: 1;
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uint32_t ms_mode: 1;
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uint32_t trans_start: 1;
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uint32_t tx_lsb_first: 1;
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uint32_t rx_lsb_first: 1;
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uint32_t clk_en: 1;
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uint32_t arbitration_en: 1;
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uint32_t fsm_rst: 1;
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uint32_t ref_always_on: 1;
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uint32_t reserved12: 20;
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uint32_t sda_force_out: 1;
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uint32_t scl_force_out: 1;
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uint32_t sample_scl_level: 1;
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uint32_t rx_full_ack_level: 1;
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uint32_t ms_mode: 1;
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uint32_t trans_start: 1;
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uint32_t tx_lsb_first: 1;
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uint32_t rx_lsb_first: 1;
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uint32_t clk_en: 1;
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uint32_t arbitration_en: 1;
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uint32_t fsm_rst: 1;
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uint32_t conf_upgate: 1;
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uint32_t slv_tx_auto_start_en: 1;
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uint32_t reserved13: 19;
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};
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uint32_t val;
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} ctr;
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union {
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struct {
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uint32_t ack_rec: 1;
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uint32_t resp_rec: 1;
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uint32_t slave_rw: 1;
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uint32_t time_out: 1;
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uint32_t reserved2: 1;
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uint32_t arb_lost: 1;
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uint32_t bus_busy: 1;
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uint32_t slave_addressed: 1;
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uint32_t byte_trans: 1;
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uint32_t reserved6: 1;
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uint32_t reserved7: 1;
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uint32_t rx_fifo_cnt: 6;
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uint32_t reserved14: 4;
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uint32_t stretch_cause: 2;
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uint32_t reserved16: 2;
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uint32_t tx_fifo_cnt: 6;
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uint32_t scl_main_state_last: 3;
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uint32_t reserved27: 1;
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@@ -67,9 +69,9 @@ typedef volatile struct {
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} status_reg;
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union {
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struct {
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uint32_t tout: 24;
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uint32_t time_out_en: 1;
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uint32_t reserved25: 7;
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uint32_t time_out_value: 5;
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uint32_t time_out_en: 1;
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uint32_t reserved6: 26;
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};
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uint32_t val;
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} timeout;
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@@ -83,216 +85,222 @@ typedef volatile struct {
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} slave_addr;
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union {
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struct {
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uint32_t rx_fifo_start_addr: 5;
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uint32_t rx_fifo_end_addr: 5;
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uint32_t tx_fifo_start_addr: 5;
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uint32_t tx_fifo_end_addr: 5;
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uint32_t rx_update: 1;
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uint32_t tx_update: 1;
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uint32_t tx_fifo_init_raddr: 5;
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uint32_t rx_fifo_init_waddr: 5;
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uint32_t rx_fifo_raddr: 5;
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uint32_t rx_fifo_waddr: 5;
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uint32_t tx_fifo_raddr: 5;
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uint32_t tx_fifo_waddr: 5;
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uint32_t reserved20: 1;
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uint32_t reserved21: 1;
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uint32_t slave_rw_point: 8;
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uint32_t reserved30: 2;
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};
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uint32_t val;
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} fifo_st;
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union {
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struct {
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uint32_t rx_fifo_full_thrhd: 5;
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uint32_t tx_fifo_empty_thrhd: 5;
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uint32_t nonfifo_en: 1;
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uint32_t fifo_addr_cfg_en: 1;
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uint32_t rx_fifo_rst: 1;
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uint32_t tx_fifo_rst: 1;
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uint32_t nonfifo_rx_thres: 6;
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uint32_t nonfifo_tx_thres: 6;
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uint32_t reserved26: 6;
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uint32_t rx_fifo_wm_thrhd: 5;
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uint32_t tx_fifo_wm_thrhd: 5;
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uint32_t nonfifo_en: 1;
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uint32_t fifo_addr_cfg_en: 1;
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uint32_t rx_fifo_rst: 1;
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uint32_t tx_fifo_rst: 1;
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uint32_t fifo_prt_en: 1;
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uint32_t reserved15: 5;
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uint32_t reserved20: 6;
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uint32_t reserved26: 1;
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uint32_t reserved27: 5;
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};
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uint32_t val;
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} fifo_conf;
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union {
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struct {
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uint8_t data;
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uint8_t reserved[3];
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uint32_t data;
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};
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uint32_t val;
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} fifo_data;
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union {
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struct {
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uint32_t rx_fifo_full: 1;
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uint32_t tx_fifo_empty: 1;
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uint32_t rx_fifo_wm: 1;
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uint32_t tx_fifo_wm: 1;
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uint32_t rx_fifo_ovf: 1;
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uint32_t end_detect: 1;
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uint32_t slave_tran_comp: 1;
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uint32_t byte_trans_done: 1;
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uint32_t arbitration_lost: 1;
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uint32_t master_tran_comp: 1;
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uint32_t mst_tx_fifo_udf: 1;
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uint32_t trans_complete: 1;
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uint32_t time_out: 1;
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uint32_t trans_start: 1;
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uint32_t ack_err: 1;
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uint32_t rx_rec_full: 1;
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uint32_t tx_send_empty: 1;
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uint32_t nack: 1;
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uint32_t tx_fifo_ovf: 1;
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uint32_t rx_fifo_udf: 1;
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uint32_t scl_st_to: 1;
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uint32_t scl_main_st_to: 1;
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uint32_t det_start: 1;
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uint32_t reserved16: 16;
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uint32_t slave_stretch: 1;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} int_raw;
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union {
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struct {
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uint32_t rx_fifo_full: 1;
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uint32_t tx_fifo_empty: 1;
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uint32_t rx_fifo_wm: 1;
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uint32_t tx_fifo_wm: 1;
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uint32_t rx_fifo_ovf: 1;
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uint32_t end_detect: 1;
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uint32_t slave_tran_comp: 1;
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uint32_t byte_trans_done: 1;
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uint32_t arbitration_lost: 1;
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uint32_t master_tran_comp: 1;
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uint32_t mst_tx_fifo_udf: 1;
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uint32_t trans_complete: 1;
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uint32_t time_out: 1;
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uint32_t trans_start: 1;
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uint32_t ack_err: 1;
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uint32_t rx_rec_full: 1;
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uint32_t tx_send_empty: 1;
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uint32_t nack: 1;
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uint32_t tx_fifo_ovf: 1;
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uint32_t rx_fifo_udf: 1;
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uint32_t scl_st_to: 1;
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uint32_t scl_main_st_to: 1;
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uint32_t det_start: 1;
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uint32_t reserved16: 16;
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uint32_t slave_stretch: 1;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} int_clr;
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union {
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struct {
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uint32_t rx_fifo_full: 1;
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uint32_t tx_fifo_empty: 1;
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uint32_t rx_fifo_wm: 1;
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uint32_t tx_fifo_wm: 1;
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uint32_t rx_fifo_ovf: 1;
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uint32_t end_detect: 1;
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uint32_t slave_tran_comp: 1;
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uint32_t byte_trans_done: 1;
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uint32_t arbitration_lost: 1;
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uint32_t master_tran_comp: 1;
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uint32_t mst_tx_fifo_udf: 1;
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uint32_t trans_complete: 1;
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uint32_t time_out: 1;
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uint32_t trans_start: 1;
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uint32_t ack_err: 1;
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uint32_t rx_rec_full: 1;
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uint32_t tx_send_empty: 1;
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uint32_t nack: 1;
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uint32_t tx_fifo_ovf: 1;
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uint32_t rx_fifo_udf: 1;
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uint32_t scl_st_to: 1;
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uint32_t scl_main_st_to: 1;
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uint32_t det_start: 1;
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uint32_t reserved16: 16;
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uint32_t slave_stretch: 1;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} int_ena;
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union {
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struct {
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uint32_t rx_fifo_full: 1;
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uint32_t tx_fifo_empty: 1;
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uint32_t rx_fifo_wm: 1;
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uint32_t tx_fifo_wm: 1;
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uint32_t rx_fifo_ovf: 1;
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uint32_t end_detect: 1;
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uint32_t slave_tran_comp: 1;
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uint32_t byte_trans_done: 1;
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uint32_t arbitration_lost: 1;
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uint32_t master_tran_comp: 1;
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uint32_t mst_tx_fifo_udf: 1;
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uint32_t trans_complete: 1;
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uint32_t time_out: 1;
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uint32_t trans_start: 1;
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uint32_t ack_err: 1;
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uint32_t rx_rec_full: 1;
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uint32_t tx_send_empty: 1;
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uint32_t nack: 1;
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uint32_t tx_fifo_ovf: 1;
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uint32_t rx_fifo_udf: 1;
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uint32_t scl_st_to: 1;
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uint32_t scl_main_st_to: 1;
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uint32_t det_start: 1;
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uint32_t reserved16: 16;
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uint32_t slave_stretch: 1;
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uint32_t reserved17: 15;
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};
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uint32_t val;
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} int_status;
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union {
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struct {
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uint32_t time: 10;
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uint32_t reserved10: 22;
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uint32_t time: 9;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} sda_hold;
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union {
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struct {
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uint32_t time: 10;
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uint32_t reserved10: 22;
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uint32_t time: 9;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} sda_sample;
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union {
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struct {
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uint32_t period: 14;
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uint32_t scl_wait_high_period: 14;
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uint32_t reserved28: 4;
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uint32_t period: 9;
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uint32_t scl_wait_high_period: 7;
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uint32_t reserved16: 16;
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};
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uint32_t val;
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} scl_high_period;
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uint32_t reserved_3c;
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union {
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struct {
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uint32_t time: 10;
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uint32_t reserved10: 22;
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uint32_t time: 9;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} scl_start_hold;
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union {
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struct {
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uint32_t time: 10;
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uint32_t reserved10: 22;
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uint32_t time: 9;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} scl_rstart_setup;
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union {
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struct {
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uint32_t time: 14;
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uint32_t reserved14: 18;
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uint32_t time: 9;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} scl_stop_hold;
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union {
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struct {
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uint32_t time: 10;
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uint32_t reserved10: 22;
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uint32_t time: 9;
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uint32_t reserved9: 23;
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};
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uint32_t val;
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} scl_stop_setup;
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union {
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struct {
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uint32_t thres: 3;
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uint32_t en: 1;
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uint32_t reserved4: 28;
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uint32_t scl_thres: 4;
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uint32_t sda_thres: 4;
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uint32_t scl_en: 1;
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uint32_t sda_en: 1;
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uint32_t reserved10: 22;
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};
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uint32_t val;
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} scl_filter_cfg;
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} filter_cfg;
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union {
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struct {
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uint32_t thres: 3;
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uint32_t en: 1;
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uint32_t reserved4: 28;
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uint32_t sclk_div_num: 8;
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uint32_t sclk_div_a: 6;
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uint32_t sclk_div_b: 6;
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uint32_t sclk_sel: 1;
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uint32_t sclk_active: 1;
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uint32_t reserved22: 10;
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};
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uint32_t val;
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} sda_filter_cfg;
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} clk_conf;
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union {
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struct {
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uint32_t byte_num: 8; /*Byte_num represent the number of data need to be send or data need to be received.*/
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uint32_t ack_en: 1; /*ack_check_en ack_exp and ack value are used to control the ack bit.*/
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uint32_t ack_exp: 1; /*ack_check_en ack_exp and ack value are used to control the ack bit.*/
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uint32_t ack_val: 1; /*ack_check_en ack_exp and ack value are used to control the ack bit.*/
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uint32_t op_code: 3; /*op_code is the command 0：RSTART 1：WRITE 2：READ 3：STOP . 4:END.*/
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uint32_t command0: 14;
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uint32_t reserved14: 17;
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uint32_t done: 1;
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};
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uint32_t val;
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} command[16];
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} command[8];
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union {
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struct {
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uint32_t scl_st_to: 24;
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uint32_t reserved24: 8;
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uint32_t scl_st_to: 5; /*no more than 23*/
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uint32_t reserved5: 27;
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};
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uint32_t val;
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} scl_st_time_out;
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union {
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struct {
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uint32_t scl_main_st_to: 24;
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uint32_t reserved24: 8;
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uint32_t scl_main_st_to: 5; /*no more than 23*/
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uint32_t reserved5: 27;
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};
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uint32_t val;
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} scl_main_st_time_out;
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@@ -306,6 +314,22 @@ typedef volatile struct {
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};
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uint32_t val;
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} scl_sp_conf;
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union {
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struct {
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uint32_t stretch_protect_num: 10;
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uint32_t slave_scl_stretch_en: 1;
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uint32_t slave_scl_stretch_clr: 1;
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uint32_t reserved12: 20;
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};
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uint32_t val;
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} scl_stretch_conf;
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uint32_t reserved_88;
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uint32_t reserved_8c;
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uint32_t reserved_90;
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uint32_t reserved_94;
|
||||
uint32_t reserved_98;
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uint32_t reserved_9c;
|
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uint32_t reserved_a0;
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uint32_t reserved_a4;
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||||
uint32_t reserved_a8;
|
||||
uint32_t reserved_ac;
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||||
@@ -329,7 +353,39 @@ typedef volatile struct {
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uint32_t reserved_f4;
|
||||
uint32_t date; /**/
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||||
uint32_t reserved_fc;
|
||||
uint32_t ram_data[32]; /**/
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uint32_t txfifo_start_addr; /**/
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uint32_t reserved_104;
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||||
uint32_t reserved_108;
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||||
uint32_t reserved_10c;
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||||
uint32_t reserved_110;
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uint32_t reserved_114;
|
||||
uint32_t reserved_118;
|
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uint32_t reserved_11c;
|
||||
uint32_t reserved_120;
|
||||
uint32_t reserved_124;
|
||||
uint32_t reserved_128;
|
||||
uint32_t reserved_12c;
|
||||
uint32_t reserved_130;
|
||||
uint32_t reserved_134;
|
||||
uint32_t reserved_138;
|
||||
uint32_t reserved_13c;
|
||||
uint32_t reserved_140;
|
||||
uint32_t reserved_144;
|
||||
uint32_t reserved_148;
|
||||
uint32_t reserved_14c;
|
||||
uint32_t reserved_150;
|
||||
uint32_t reserved_154;
|
||||
uint32_t reserved_158;
|
||||
uint32_t reserved_15c;
|
||||
uint32_t reserved_160;
|
||||
uint32_t reserved_164;
|
||||
uint32_t reserved_168;
|
||||
uint32_t reserved_16c;
|
||||
uint32_t reserved_170;
|
||||
uint32_t reserved_174;
|
||||
uint32_t reserved_178;
|
||||
uint32_t reserved_17c;
|
||||
uint32_t fifo_start_addr; /**/
|
||||
} i2c_dev_t;
|
||||
|
||||
extern i2c_dev_t I2C0;
|
||||
|
||||
Reference in New Issue
Block a user