mirror of
https://github.com/espressif/esp-idf.git
synced 2025-09-30 19:19:21 +00:00
refactor(freertos): Refactor usage of portBASE_TYPE to BaseType_t
portBASE_TYPE is an internal macro defined by the porting layer. This commit changes all references to BaseType_t which is the official type exposed by FreeRTOS.
This commit is contained in:
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -229,7 +229,7 @@ static i2c_clk_alloc_t i2c_clk_alloc[] = {
|
||||
|
||||
static i2c_obj_t *p_i2c_obj[I2C_NUM_MAX] = {0};
|
||||
static void i2c_isr_handler_default(void *arg);
|
||||
static void i2c_master_cmd_begin_static(i2c_port_t i2c_num, portBASE_TYPE* HPTaskAwoken);
|
||||
static void i2c_master_cmd_begin_static(i2c_port_t i2c_num, BaseType_t* HPTaskAwoken);
|
||||
static esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num);
|
||||
|
||||
static void i2c_hw_disable(i2c_port_t i2c_num)
|
||||
@@ -536,8 +536,8 @@ static void IRAM_ATTR i2c_isr_handler_default(void *arg)
|
||||
return;
|
||||
}
|
||||
i2c_intr_event_t evt_type = I2C_INTR_EVENT_ERR;
|
||||
portBASE_TYPE HPTaskAwoken = pdFALSE;
|
||||
portBASE_TYPE HPTaskAwokenCallee = pdFALSE;
|
||||
BaseType_t HPTaskAwoken = pdFALSE;
|
||||
BaseType_t HPTaskAwokenCallee = pdFALSE;
|
||||
if (p_i2c->mode == I2C_MODE_MASTER) {
|
||||
if (p_i2c->status == I2C_STATUS_WRITE) {
|
||||
i2c_hal_master_handle_tx_event(&(i2c_context[i2c_num].hal), &evt_type);
|
||||
@@ -1357,7 +1357,7 @@ static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) {
|
||||
return cmd->total_bytes == 1;
|
||||
}
|
||||
|
||||
static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num, portBASE_TYPE* HPTaskAwoken)
|
||||
static void IRAM_ATTR i2c_master_cmd_begin_static(i2c_port_t i2c_num, BaseType_t* HPTaskAwoken)
|
||||
{
|
||||
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
|
||||
i2c_cmd_evt_t evt = { 0 };
|
||||
@@ -1504,7 +1504,7 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
|
||||
esp_err_t ret = ESP_FAIL;
|
||||
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
|
||||
TickType_t ticks_start = xTaskGetTickCount();
|
||||
portBASE_TYPE res = xSemaphoreTake(p_i2c->cmd_mux, ticks_to_wait);
|
||||
BaseType_t res = xSemaphoreTake(p_i2c->cmd_mux, ticks_to_wait);
|
||||
if (res == pdFALSE) {
|
||||
return ESP_ERR_TIMEOUT;
|
||||
}
|
||||
@@ -1554,7 +1554,7 @@ esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle,
|
||||
// In master mode, since we don't have an interrupt to detective bus error or FSM state, what we do here is to make
|
||||
// sure the interrupt mechanism for master mode is still working.
|
||||
// If the command sending is not finished and there is no interrupt any more, the bus is probably dead caused by external noise.
|
||||
portBASE_TYPE evt_res = xQueueReceive(p_i2c->cmd_evt_queue, &evt, wait_time);
|
||||
BaseType_t evt_res = xQueueReceive(p_i2c->cmd_evt_queue, &evt, wait_time);
|
||||
if (evt_res == pdTRUE) {
|
||||
if (evt.type == I2C_CMD_EVT_DONE) {
|
||||
if (p_i2c->status == I2C_STATUS_TIMEOUT) {
|
||||
@@ -1602,7 +1602,7 @@ int i2c_slave_write_buffer(i2c_port_t i2c_num, const uint8_t *data, int size, Ti
|
||||
ESP_RETURN_ON_FALSE(p_i2c_obj[i2c_num]->mode == I2C_MODE_SLAVE, ESP_FAIL, I2C_TAG, I2C_MODE_SLAVE_ERR_STR);
|
||||
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
|
||||
|
||||
portBASE_TYPE res;
|
||||
BaseType_t res;
|
||||
int cnt = 0;
|
||||
TickType_t ticks_end = xTaskGetTickCount() + ticks_to_wait;
|
||||
|
||||
|
Reference in New Issue
Block a user