feat(soc/usb): Add USB related changes to soc_caps and usb_dwc_periph

This commit changes the following:

- Add types and data structures indicating the available USB controllers
for each target.

components/soc/esp32p4/include/soc/Kconfig.soc_caps.in

@@ -1087,6 +1087,14 @@ config SOC_MCPWM_CAPTURE_CLK_FROM_GROUP
     bool
     default y
 
+config SOC_USB_OTG_PERIPH_NUM
+    int
+    default 2
+
+config SOC_USB_UTMI_PHY_NUM
+    int
+    default 1
+
 config SOC_PARLIO_GROUPS
     int
     default 1

components/soc/esp32p4/include/soc/soc_caps.h

@@ -411,9 +411,16 @@
 #define SOC_MCPWM_SUPPORT_EVENT_COMPARATOR   (1)    ///< Support event comparator (based on ETM)
 #define SOC_MCPWM_CAPTURE_CLK_FROM_GROUP     (1)    ///< Capture timer shares clock with other PWM timers
 
-/*------------------------ USB SERIAL JTAG CAPS ------------------------------*/
+/*-------------------------- USB CAPS ----------------------------------------*/
+// USB Serial JTAG Caps
 // #define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP     (1)     /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395
 
+// USB OTG Caps
+#define SOC_USB_OTG_PERIPH_NUM          (2U)
+
+// USB PHY Caps
+#define SOC_USB_UTMI_PHY_NUM            (1U)
+
 /*-------------------------- PARLIO CAPS --------------------------------------*/
 #define SOC_PARLIO_GROUPS                    1U  /*!< Number of parallel IO peripherals */
 #define SOC_PARLIO_TX_UNITS_PER_GROUP        1U  /*!< number of TX units in each group */

components/soc/esp32p4/usb_dwc_periph.c

@@ -0,0 +1,50 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <stddef.h>
+#include "soc/interrupts.h"
+#include "soc/gpio_sig_map.h"
+#include "soc/usb_dwc_periph.h"
+#include "soc/usb_dwc_struct.h"
+
+/* -------------------------------- Private --------------------------------- */
+
+static const usb_utmi_otg_signal_conn_t dwc_fs_otg_signals = {
+    // Inputs
+    .iddig          = USB_OTG11_IDDIG_PAD_IN_IDX,
+    .avalid         = USB_OTG11_AVALID_PAD_IN_IDX,
+    .bvalid         = USB_SRP_BVALID_PAD_IN_IDX,
+    .vbusvalid      = USB_OTG11_VBUSVALID_PAD_IN_IDX,
+    .sessend        = USB_SRP_SESSEND_PAD_IN_IDX,
+    // Outputs
+    .idpullup       = USB_OTG11_IDPULLUP_PAD_OUT_IDX,
+    .dppulldown     = USB_OTG11_DPPULLDOWN_PAD_OUT_IDX,
+    .dmpulldown     = USB_OTG11_DMPULLDOWN_PAD_OUT_IDX,
+    .drvvbus        = USB_OTG11_DRVVBUS_PAD_OUT_IDX,
+    .chrgvbus       = USB_SRP_CHRGVBUS_PAD_OUT_IDX,
+    .dischrgvbus    = USB_SRP_DISCHRGVBUS_PAD_OUT_IDX,
+};
+
+/* --------------------------------- Public --------------------------------- */
+
+const usb_dwc_info_t usb_dwc_info = {
+    .controllers = {
+        // High-Speed USB-DWC
+        [0] = {
+            .fsls_signals = NULL,
+            .otg_signals = NULL,
+            .irq = ETS_USB_OTG_INTR_SOURCE,
+            .irq_2nd_cpu = ETS_USB_OTG_ENDP_MULTI_PROC_INTR_SOURCE,
+        },
+        // Full-Speed USB-DWC
+        [1] = {
+            .fsls_signals = NULL,
+            .otg_signals = &dwc_fs_otg_signals,
+            .irq = ETS_USB_OTG11_CH0_INTR_SOURCE,
+            .irq_2nd_cpu = -1,
+        },
+    },
+};