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feat(psram): esp32p4 psram device driver support

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This commit is contained in:
Armando
2023-08-28 10:20:56 +08:00
parent bc4bdd6169
commit 712c0c0075
26 changed files with 2190 additions and 258 deletions
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9
components/esp_psram/esp32s2/esp_psram_impl_quad.c
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@@ -3,7 +3,7 @@
*/
/*
* SPDX-FileCopyrightText: 2013-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2013-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -93,6 +93,10 @@ static const char* TAG = "quad_psram";
#define _SPI_40M_CLK_DIV 2
#define _SPI_20M_CLK_DIV 4
typedef enum {
PSRAM_VADDR_MODE_NORMAL = 0,
} psram_vaddr_mode_t;
typedef enum {
PSRAM_CLK_MODE_NORM = 0, /*!< Normal SPI mode */
PSRAM_CLK_MODE_A1C, /*!< ONE extra clock cycles after CS is set high level */
@@ -410,8 +414,9 @@ static void psram_set_clk_mode(int spi_num, psram_clk_mode_t clk_mode)
* Psram mode init will overwrite original flash speed mode, so that it is possible to change psram and flash speed after OTA.
* Flash read mode(QIO/QOUT/DIO/DOUT) will not be changed in app bin. It is decided by bootloader, OTA can not change this mode.
*/
esp_err_t IRAM_ATTR esp_psram_impl_enable(psram_vaddr_mode_t vaddrmode) //psram init
esp_err_t IRAM_ATTR esp_psram_impl_enable(void) //psram init
{
psram_vaddr_mode_t vaddrmode = PSRAM_VADDR_MODE_NORMAL;
psram_cache_speed_t mode = PSRAM_SPEED;
assert(mode < PSRAM_CACHE_MAX && "we don't support any other mode for now.");
// GPIO related settings