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feat(psram): esp32p4 psram device driver support
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@@ -108,5 +108,14 @@ menu "SPI RAM config"
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default 80 if SPIRAM_SPEED_80M
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default 40 if SPIRAM_SPEED_40M
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config SPIRAM_ECC_ENABLE
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bool "Enable SPI RAM ECC"
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default n
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depends on SPIRAM_MODE_OCT
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help
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Enable MSPI Error-Correcting Code function when accessing SPIRAM.
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If enabled, 1/16 of the SPI RAM total size will be reserved for error-correcting code.
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source "$IDF_PATH/components/esp_psram/Kconfig.spiram.common" # insert non-chip-specific items here
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endmenu
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@@ -294,7 +294,7 @@ static void s_configure_psram_ecc(void)
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#endif
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}
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esp_err_t esp_psram_impl_enable(psram_vaddr_mode_t vaddrmode)
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esp_err_t esp_psram_impl_enable(void)
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{
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s_init_psram_pins();
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s_set_psram_cs_timing();
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@@ -303,7 +303,7 @@ static void psram_gpio_config(void)
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esp_gpio_reserve_pins(BIT64(cs1_io) | BIT64(wp_io));
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}
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esp_err_t esp_psram_impl_enable(psram_vaddr_mode_t vaddrmode) //psram init
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esp_err_t esp_psram_impl_enable(void) //psram init
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{
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psram_gpio_config();
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psram_set_cs_timing();
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