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https://github.com/espressif/esp-idf.git
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esp_gdbstub: refactor code
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81
components/esp_gdbstub/src/port/riscv/gdbstub_riscv.c
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81
components/esp_gdbstub/src/port/riscv/gdbstub_riscv.c
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include "esp_gdbstub.h"
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#include "esp_gdbstub_common.h"
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#include "sdkconfig.h"
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static inline void init_regfile(esp_gdbstub_gdb_regfile_t *dst)
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{
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memset(dst, 0, sizeof(*dst));
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}
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void esp_gdbstub_frame_to_regfile(const esp_gdbstub_frame_t *frame, esp_gdbstub_gdb_regfile_t *dst)
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{
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init_regfile(dst);
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dst->pc = frame->mepc;
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// We omit register x0 here since it's the zero register and always hard-wired to 0.
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// See The RISC-V Instruction Set Manual Volume I: Unprivileged ISA Document Version 20191213 for more details.
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memcpy(&(dst->x[1]), &frame->ra, sizeof(uint32_t) * 31);
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}
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#ifdef CONFIG_ESP_GDBSTUB_SUPPORT_TASKS
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/* Represents FreeRTOS TCB structure */
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typedef struct {
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uint8_t *top_of_stack;
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/* Other members aren't needed */
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} dummy_tcb_t;
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void esp_gdbstub_tcb_to_regfile(TaskHandle_t tcb, esp_gdbstub_gdb_regfile_t *dst)
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{
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const dummy_tcb_t *dummy_tcb = (const dummy_tcb_t *) tcb;
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const RvExcFrame *frame = (RvExcFrame *) dummy_tcb->top_of_stack;
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esp_gdbstub_frame_to_regfile(frame, dst);
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}
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#endif // CONFIG_ESP_GDBSTUB_SUPPORT_TASKS
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int esp_gdbstub_get_signal(const esp_gdbstub_frame_t *frame)
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{
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return 5; // SIGTRAP, see IDF-2490
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}
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void _xt_gdbstub_int(void *frame)
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{
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}
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void esp_gdbstub_init_dports()
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{
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}
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void esp_gdbstub_stall_other_cpus_start()
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{
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}
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void esp_gdbstub_stall_other_cpus_end()
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{
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}
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void esp_gdbstub_clear_step()
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{
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}
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void esp_gdbstub_do_step()
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{
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}
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void esp_gdbstub_trigger_cpu(void)
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{
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}
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void esp_gdbstub_set_register(esp_gdbstub_frame_t *frame, uint32_t reg_index, uint32_t value)
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{
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}
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@@ -0,0 +1,36 @@
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "riscv/rvruntime-frames.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef RvExcFrame esp_gdbstub_frame_t;
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/* GDB regfile structure, configuration dependent */
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typedef struct {
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uint32_t x[32];
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uint32_t pc;
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} esp_gdbstub_gdb_regfile_t;
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// Amount of HW breakpoints used in GDB
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#ifndef GDB_BP_SIZE
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#define GDB_BP_SIZE 2
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#endif // GDB_BP_SIZE
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// Amount of HW watchpoints used in GDB
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#ifndef GDB_WP_SIZE
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#define GDB_WP_SIZE 2
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#endif // GDB_WP_SIZE
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#ifdef __cplusplus
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}
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#endif
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@@ -0,0 +1,41 @@
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_gdbstub_memory_regions_common.h"
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#include "soc/soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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static inline bool __is_valid_memory_region(intptr_t addr)
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{
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return (addr >= SOC_DROM_LOW && addr < SOC_DROM_HIGH) ||
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(addr >= SOC_IROM_LOW && addr < SOC_IROM_HIGH) ||
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(addr >= SOC_IRAM_LOW && addr < SOC_IRAM_HIGH) ||
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(addr >= SOC_DRAM_LOW && addr < SOC_DRAM_HIGH) ||
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(addr >= SOC_IROM_MASK_LOW && addr < SOC_IROM_MASK_HIGH) ||
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(addr >= SOC_DROM_MASK_LOW && addr < SOC_DROM_MASK_HIGH) ||
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#if defined(SOC_RTC_IRAM_LOW) && defined(SOC_RTC_IRAM_HIGH)
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(addr >= SOC_RTC_IRAM_LOW && addr < SOC_RTC_IRAM_HIGH) ||
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/* RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them */
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#endif
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(addr >= SOC_PERIPHERAL_LOW && addr < SOC_PERIPHERAL_HIGH) ||
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(addr >= SOC_DEBUG_LOW && addr < SOC_DEBUG_HIGH);
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}
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static inline bool is_valid_memory_region(intptr_t addr)
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{
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/* We shouldn't read transport registers since it will disturb the debugging. */
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return (!is_transport_memory_region(addr)) && __is_valid_memory_region(addr);
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}
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#ifdef __cplusplus
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}
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#endif
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