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uart: add default source clock for all targets

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This commit is contained in:
morris
2022-04-29 12:10:05 +08:00
parent 660ff8e840
commit 722fde218d
39 changed files with 152 additions and 128 deletions
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4
components/hal/esp32c2/include/hal/uart_ll.h
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@@ -105,7 +105,7 @@ static inline void uart_ll_set_sclk(uart_dev_t *hw, uart_sclk_t source_clk)
{
switch (source_clk) {
default:
case UART_SCLK_APB:
case UART_SCLK_PLL_F40M:
hw->clk_conf.sclk_sel = 1;
break;
case UART_SCLK_RTC:
@@ -130,7 +130,7 @@ static inline void uart_ll_get_sclk(uart_dev_t *hw, uart_sclk_t *source_clk)
switch (hw->clk_conf.sclk_sel) {
default:
case 1:
*source_clk = UART_SCLK_APB;
*source_clk = UART_SCLK_PLL_F40M;
break;
case 2:
*source_clk = UART_SCLK_RTC;