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Merge branch 'refactor/rng_ll_c6' into 'master'
refactor(rng): refactor to use hal/ll apis for c6 Closes IDF-12533 See merge request espressif/esp-idf!37319
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -223,6 +223,15 @@ static inline void adc_ll_digi_set_pattern_table(adc_unit_t adc_n, uint32_t patt
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}
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}
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/**
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* Rest pattern table to default value
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*/
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static inline void adc_ll_digi_reset_pattern_table(void)
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{
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APB_SARADC.saradc_sar_patt_tab1.saradc_saradc_sar_patt_tab1 = 0xffffff;
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APB_SARADC.saradc_sar_patt_tab2.saradc_saradc_sar_patt_tab2 = 0xffffff;
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}
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/**
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* Reset the pattern table pointer, then take the measurement rule from table header in next measurement.
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*
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@@ -613,6 +622,10 @@ static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t c
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//Not used on ESP32C6
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}
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/*---------------------------------------------------------------
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Calibration
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---------------------------------------------------------------*/
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/* ADC calibration code. */
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/**
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* @brief Set common calibration configuration. Should be shared with other parts (PWDET).
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@@ -665,11 +678,81 @@ static inline void adc_ll_calibration_finish(adc_unit_t adc_n)
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__attribute__((always_inline))
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static inline void adc_ll_set_calibration_param(adc_unit_t adc_n, uint32_t param)
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{
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HAL_ASSERT(adc_n == ADC_UNIT_1);
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uint8_t msb = param >> 8;
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uint8_t lsb = param & 0xFF;
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb);
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if (adc_n == ADC_UNIT_1) {
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb);
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} else {
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//C6 doesn't support ADC2, here is for backward compatibility for RNG
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_HIGH_ADDR, msb);
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_LOW_ADDR, lsb);
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}
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}
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/**
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* Set the SAR DTEST param
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*
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* @param param DTEST value
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*/
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__attribute__((always_inline))
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static inline void adc_ll_set_dtest_param(uint32_t param)
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{
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_DTEST_RTC_ADDR, param);
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}
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/**
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* Set the SAR ENT param
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*
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* @param param ENT value
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*/
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__attribute__((always_inline))
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static inline void adc_ll_set_ent_param(uint32_t param)
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{
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC_ENT_RTC_ADDR, param);
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}
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/**
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* Enable/disable the calibration voltage reference for ADC unit.
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*
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* @param adc_n ADC index number.
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* @param en true to enable, false to disable
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*/
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__attribute__((always_inline))
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static inline void adc_ll_enable_calibration_ref(adc_unit_t adc_n, bool en)
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{
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//C6 doesn't support ADC2, here is for backward compatibility for RNG
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if (adc_n == ADC_UNIT_1) {
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC1_ENCAL_REF_ADDR, en);
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} else {
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REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SARADC2_ENCAL_REF_ADDR, en);
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}
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}
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/**
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* Init regi2c SARADC registers
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*/
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__attribute__((always_inline))
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static inline void adc_ll_regi2c_init(void)
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{
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adc_ll_set_dtest_param(2);
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adc_ll_set_ent_param(1);
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// Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source
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adc_ll_enable_calibration_ref(ADC_UNIT_1, true);
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adc_ll_enable_calibration_ref(ADC_UNIT_2, true);
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}
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/**
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* Deinit regi2c SARADC registers
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*/
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__attribute__((always_inline))
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static inline void adc_ll_regi2c_adc_deinit(void)
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{
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adc_ll_set_dtest_param(0);
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adc_ll_set_ent_param(0);
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adc_ll_enable_calibration_ref(ADC_UNIT_1, false);
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adc_ll_enable_calibration_ref(ADC_UNIT_2, false);
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}
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/*---------------------------------------------------------------
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -10,6 +10,7 @@
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#include <stdint.h>
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#include "soc/soc.h"
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#include "soc/regi2c_defs.h"
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#include "soc/pmu_reg.h"
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#include "modem/modem_lpcon_struct.h"
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#ifdef __cplusplus
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@@ -111,6 +112,38 @@ static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
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SET_PERI_REG_MASK(ANA_CONFIG2_REG, ANA_I2C_SAR_FORCE_PD);
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}
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/**
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* @brief Enable regi2c controlled periph registers
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*/
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static inline void regi2c_ctrl_ll_i2c_periph_enable(void)
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{
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SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C);
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}
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/**
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* @brief Disable regi2c controlled periph registers
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*/
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static inline void regi2c_ctrl_ll_i2c_periph_disable(void)
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{
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CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C);
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}
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/**
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* @brief Enter / Exit reset state
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*
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* @param enter True to reset mode, false to normal working mode
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*/
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static inline void regi2c_ctrl_ll_reset(bool enter)
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{
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if (enter) {
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// Reset mode
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CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
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} else {
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// Normal working mode
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SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
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}
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}
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#ifdef __cplusplus
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}
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#endif
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