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refactor(apll): move the apll soc caps to clk_tree_ll

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laokaiyao
2023-09-06 10:55:47 +08:00
parent 0b0f25c30d
commit 72a0746e62
30 changed files with 430 additions and 312 deletions
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2
components/driver/dac/esp32/dac_dma.c
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@@ -47,7 +47,7 @@ static const char *TAG = "DAC_DMA";
static uint32_t s_dac_set_apll_freq(uint32_t mclk)
{
/* Calculate the expected APLL */
int div = (int)((SOC_APLL_MIN_HZ / mclk) + 1);
int div = (int)((CLK_LL_APLL_MIN_HZ / mclk) + 1);
/* apll_freq = mclk * div
* when div = 1, hardware will still divide 2
* when div = 0, hardware will divide 255