alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-17 07:09:37 +00:00
Code Issues Packages Projects Releases Wiki Activity

refactor(apll): move the apll soc caps to clk_tree_ll

Browse Source
This commit is contained in:
laokaiyao
2023-09-06 10:55:47 +08:00
parent 0b0f25c30d
commit 72a0746e62
30 changed files with 430 additions and 312 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
components/hal/esp32s2/include/hal/clk_tree_ll.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -47,6 +47,15 @@ extern "C" {
#define CLK_LL_APLL_CAL_DELAY_2 0x3f
#define CLK_LL_APLL_CAL_DELAY_3 0x1f
/* APLL multiplier output frequency range */
// apll_multiplier_out = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)
#define CLK_LL_APLL_MULTIPLIER_MIN_HZ (350000000) // 350 MHz
#define CLK_LL_APLL_MULTIPLIER_MAX_HZ (500000000) // 500 MHz
/* APLL output frequency range */
#define CLK_LL_APLL_MIN_HZ (5303031) // 5.303031 MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define CLK_LL_APLL_MAX_HZ (125000000) // 125MHz, refer to 'periph_rtc_apll_freq_set' for the calculation
#define CLK_LL_XTAL32K_CONFIG_DEFAULT() { \
.dac = 3, \
.dres = 3, \

84
components/hal/esp32s2/include/hal/i2s_ll.h
View File

@@ -82,53 +82,73 @@ static inline void i2s_ll_dma_enable_eof_on_fifo_empty(i2s_dev_t *hw, bool en)
hw->lc_conf.out_eof_mode = en;
}
/**
* @brief Enable the bus clock for I2S module
*
* @param i2s_id The port id of I2S
* @param enable Set true to enable the buf clock
*/
static inline void i2s_ll_enable_bus_clock(int i2s_id, bool enable)
{
if (enable) {
if (i2s_id == 0) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
} else {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S1_CLK_EN);
}
} else {
if (i2s_id == 0) {
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
} else {
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S1_CLK_EN);
}
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; i2s_ll_enable_bus_clock(__VA_ARGS__)
/**
* @brief Reset the I2S module
*
* @param i2s_id The port id of I2S
*/
static inline void i2s_ll_reset_register(int i2s_id)
{
if (i2s_id == 0) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
} else {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S1_RST);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S1_RST);
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; i2s_ll_reset_register(__VA_ARGS__)
/**
* @brief I2S module general init, enable I2S clock.
*
* @param hw Peripheral I2S hardware instance address.
* @param enable set true to enable the core clock
*/
static inline void i2s_ll_enable_clock(i2s_dev_t *hw)
static inline void i2s_ll_enable_core_clock(i2s_dev_t *hw, bool enable)
{
if (hw == &I2S0) {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
} else {
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S1_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S1_RST);
}
if (hw->clkm_conf.clk_en == 0) {
if (enable && !hw->clkm_conf.clk_en) {
hw->clkm_conf.clk_sel = 2;
hw->clkm_conf.clk_en = 1;
hw->conf2.val = 0;
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_enable_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; i2s_ll_enable_clock(__VA_ARGS__)
/**
* @brief I2S module disable clock.
*
* @param hw Peripheral I2S hardware instance address.
*/
static inline void i2s_ll_disable_clock(i2s_dev_t *hw)
{
if (hw->clkm_conf.clk_en == 1) {
} else if (!enable && hw->clkm_conf.clk_en) {
hw->clkm_conf.clk_en = 0;
}
if (hw == &I2S0) {
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
} else {
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S1_CLK_EN);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S1_RST);
}
}
/// use a macro to wrap the function, force the caller to use it in a critical section
/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
#define i2s_ll_disable_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; i2s_ll_disable_clock(__VA_ARGS__)
#define i2s_ll_enable_core_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; i2s_ll_enable_core_clock(__VA_ARGS__)
/**
* @brief I2S tx msb right enable