mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-26 02:02:02 +00:00
spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files components/soc: decoupled compare and set operations from FreeRTOS soc/spinlock: filled initial implementation of spinlock refactor It will decouple the spinlocks into separated components with not depencences of freertos an similar interface was provided focusing the readabillity and maintenance, also naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros gained a form of wrapper functions that calls the spinlocks component thus minimizing the impact on RTOS side. This feature aims to close IDF-967 soc/spinlock: spinlocks passed on unit test, missing test corner cases components/compare_set: added better function namings plus minor performance optimization on spinlocks soc/spinlock: code reordering to remove ISC C90 mix error freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead soc/spinlock: improved spinlock performance from internal RAM For cases where the spinlock is executed from IRAM, there is no need to check where the spinlock object is placed on memory, removing this checks caused a great improvement on performance.
This commit is contained in:
Felipe Neves
committed by
Angus Gratton
Angus Gratton
parent
a7bbc74a20
commit
73592d9bc4
@@ -179,12 +179,6 @@ void vPortYieldOtherCore( BaseType_t coreid) PRIVILEGED_FUNCTION;
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*/
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void vPortSetStackWatchpoint( void* pxStackStart );
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/*
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* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
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* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
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*/
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BaseType_t xPortInIsrContext(void);
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/*
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* This function will be called in High prio ISRs. Returns true if the current core was in ISR context
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* before calling into high prio ISR context.
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@@ -239,7 +233,12 @@ static inline bool IRAM_ATTR xPortCanYield(void)
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}
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#endif
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void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
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static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
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{
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#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
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compare_and_set_extram(addr, compare, set);
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#endif
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}
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#endif /* PORTABLE_H */
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@@ -82,8 +82,7 @@ extern "C" {
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#include <xtensa/xtruntime.h>
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#include "esp_private/crosscore_int.h"
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#include "esp_timer.h" /* required for FreeRTOS run time stats */
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#include "soc/spinlock.h"
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#include <esp_heap_caps.h>
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#include "sdkconfig.h"
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@@ -133,57 +132,24 @@ typedef unsigned portBASE_TYPE UBaseType_t;
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#include "sdkconfig.h"
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#include "esp_attr.h"
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/* "mux" data structure (spinlock) */
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typedef struct {
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/* owner field values:
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* 0 - Uninitialized (invalid)
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* portMUX_FREE_VAL - Mux is free, can be locked by either CPU
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* CORE_ID_REGVAL_PRO / CORE_ID_REGVAL_APP - Mux is locked to the particular core
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*
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* Note that for performance reasons we use the full Xtensa CORE ID values
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* (CORE_ID_REGVAL_PRO, CORE_ID_REGVAL_APP) and not the 0,1 values which are used in most
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* other FreeRTOS code.
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*
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* Any value other than portMUX_FREE_VAL, CORE_ID_REGVAL_PRO, CORE_ID_REGVAL_APP indicates corruption
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*/
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uint32_t owner;
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/* count field:
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* If mux is unlocked, count should be zero.
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* If mux is locked, count is non-zero & represents the number of recursive locks on the mux.
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*/
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uint32_t count;
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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const char *lastLockedFn;
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int lastLockedLine;
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#endif
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} portMUX_TYPE;
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static inline uint32_t xPortGetCoreID(void);
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#define portMUX_FREE_VAL 0xB33FFFFF
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// Critical section management. NW-TODO: replace XTOS_SET_INTLEVEL with more efficient version, if any?
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// These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
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//
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// Only applies to one CPU. See notes above & below for reasons not to use these.
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#define portDISABLE_INTERRUPTS() do { XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); portbenchmarkINTERRUPT_DISABLE(); } while (0)
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#define portENABLE_INTERRUPTS() do { portbenchmarkINTERRUPT_RESTORE(0); XTOS_SET_INTLEVEL(0); } while (0)
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/* Special constants for vPortCPUAcquireMutexTimeout() */
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#define portMUX_NO_TIMEOUT (-1) /* When passed for 'timeout_cycles', spin forever if necessary */
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#define portMUX_TRY_LOCK 0 /* Try to acquire the spinlock a single time only */
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// Keep this in sync with the portMUX_TYPE struct definition please.
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#ifndef CONFIG_FREERTOS_PORTMUX_DEBUG
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#define portMUX_INITIALIZER_UNLOCKED { \
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.owner = portMUX_FREE_VAL, \
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.count = 0, \
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}
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#else
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#define portMUX_INITIALIZER_UNLOCKED { \
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.owner = portMUX_FREE_VAL, \
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.count = 0, \
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.lastLockedFn = "(never locked)", \
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.lastLockedLine = -1 \
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}
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#endif
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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void vPortAssertIfInISR(void);
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#define portCRITICAL_NESTING_IN_TCB 1
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// Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
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// They can be called from interrupts too.
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// WARNING: Only applies to current CPU. See notes above.
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static inline unsigned portENTER_CRITICAL_NESTED(void) {
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unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
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portbenchmarkINTERRUPT_DISABLE();
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return state;
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}
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#define portEXIT_CRITICAL_NESTED(state) do { portbenchmarkINTERRUPT_RESTORE(state); XTOS_RESTORE_JUST_INTLEVEL(state); } while (0)
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/*
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Modifications to portENTER_CRITICAL.
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@@ -211,125 +177,119 @@ Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias
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that either function can be called both from ISR as well as task context. This is not standard FreeRTOS
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behaviour; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
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*/
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void vPortCPUInitializeMutex(portMUX_TYPE *mux);
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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void vPortCPUAcquireMutex(portMUX_TYPE *mux, const char *function, int line);
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bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles, const char *function, int line);
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void vPortCPUReleaseMutex(portMUX_TYPE *mux, const char *function, int line);
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/* "mux" data structure (spinlock) */
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typedef struct {
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spinlock_t spinlock;
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} portMUX_TYPE;
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void vTaskEnterCritical( portMUX_TYPE *mux, const char *function, int line );
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void vTaskExitCritical( portMUX_TYPE *mux, const char *function, int line );
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#define portMUX_FREE_VAL SPINLOCK_FREE
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#define portMUX_NO_TIMEOUT SPINLOCK_WAIT_FOREVER /* When passed for 'timeout_cycles', spin forever if necessary */
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#define portMUX_TRY_LOCK SPINLOCK_NO_WAIT /* Try to acquire the spinlock a single time only */
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#define portMUX_INITIALIZER_UNLOCKED {.spinlock=SPINLOCK_INITIALIZER}
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#ifdef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
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/* Calling port*_CRITICAL from ISR context would cause an assert failure.
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* If the parent function is called from both ISR and Non-ISR context then call port*_CRITICAL_SAFE
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*/
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#define portENTER_CRITICAL(mux) do { \
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if(!xPortInIsrContext()) { \
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vTaskEnterCritical(mux, __FUNCTION__, __LINE__); \
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} else { \
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ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__, \
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__FUNCTION__); \
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abort(); \
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} \
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} while(0)
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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void vPortAssertIfInISR(void);
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#define portEXIT_CRITICAL(mux) do { \
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if(!xPortInIsrContext()) { \
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vTaskExitCritical(mux, __FUNCTION__, __LINE__); \
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} else { \
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ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__, \
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__FUNCTION__); \
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abort(); \
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} \
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} while(0)
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#else
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#define portENTER_CRITICAL(mux) vTaskEnterCritical(mux, __FUNCTION__, __LINE__)
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#define portEXIT_CRITICAL(mux) vTaskExitCritical(mux, __FUNCTION__, __LINE__)
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#endif
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#define portENTER_CRITICAL_ISR(mux) vTaskEnterCritical(mux, __FUNCTION__, __LINE__)
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#define portEXIT_CRITICAL_ISR(mux) vTaskExitCritical(mux, __FUNCTION__, __LINE__)
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#else
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void vTaskExitCritical( portMUX_TYPE *mux );
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void vTaskEnterCritical( portMUX_TYPE *mux );
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void vPortCPUAcquireMutex(portMUX_TYPE *mux);
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#define portCRITICAL_NESTING_IN_TCB 0
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/** @brief Acquire a portmux spinlock with a timeout
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*
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* @param mux Pointer to portmux to acquire.
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* @param timeout_cycles Timeout to spin, in CPU cycles. Pass portMUX_NO_TIMEOUT to wait forever,
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* portMUX_TRY_LOCK to try a single time to acquire the lock.
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*
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* @return true if mutex is successfully acquired, false on timeout.
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*/
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bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles);
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void vPortCPUReleaseMutex(portMUX_TYPE *mux);
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#ifdef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
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/* Calling port*_CRITICAL from ISR context would cause an assert failure.
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* If the parent function is called from both ISR and Non-ISR context then call port*_CRITICAL_SAFE
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*/
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#define portENTER_CRITICAL(mux) do { \
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if(!xPortInIsrContext()) { \
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vTaskEnterCritical(mux); \
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} else { \
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ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__, \
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__FUNCTION__); \
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abort(); \
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} \
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} while(0)
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#define portEXIT_CRITICAL(mux) do { \
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if(!xPortInIsrContext()) { \
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vTaskExitCritical(mux); \
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} else { \
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ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__, \
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__FUNCTION__); \
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abort(); \
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} \
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} while(0)
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#else
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#define portENTER_CRITICAL(mux) vTaskEnterCritical(mux)
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#define portEXIT_CRITICAL(mux) vTaskExitCritical(mux)
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#endif
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#define portENTER_CRITICAL_ISR(mux) vTaskEnterCritical(mux)
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#define portEXIT_CRITICAL_ISR(mux) vTaskExitCritical(mux)
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#endif
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#define portENTER_CRITICAL_SAFE(mux) do { \
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if (xPortInIsrContext()) { \
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portENTER_CRITICAL_ISR(mux); \
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} else { \
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portENTER_CRITICAL(mux); \
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} \
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} while(0)
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#define portEXIT_CRITICAL_SAFE(mux) do { \
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if (xPortInIsrContext()) { \
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portEXIT_CRITICAL_ISR(mux); \
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} else { \
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portEXIT_CRITICAL(mux); \
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} \
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} while(0)
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// Critical section management. NW-TODO: replace XTOS_SET_INTLEVEL with more efficient version, if any?
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// These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
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//
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// Only applies to one CPU. See notes above & below for reasons not to use these.
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#define portDISABLE_INTERRUPTS() do { XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); portbenchmarkINTERRUPT_DISABLE(); } while (0)
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#define portENABLE_INTERRUPTS() do { portbenchmarkINTERRUPT_RESTORE(0); XTOS_SET_INTLEVEL(0); } while (0)
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// Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
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// They can be called from interrupts too.
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// WARNING: Only applies to current CPU. See notes above.
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static inline unsigned portENTER_CRITICAL_NESTED(void) {
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unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
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portbenchmarkINTERRUPT_DISABLE();
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return state;
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static inline void __attribute__((always_inline)) vPortCPUInitializeMutex(portMUX_TYPE *mux)
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{
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spinlock_initialize(&mux->spinlock);
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}
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static inline void __attribute__((always_inline)) vPortCPUAcquireMutex(portMUX_TYPE *mux)
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{
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spinlock_acquire(&mux->spinlock, portMUX_NO_TIMEOUT);
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}
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static inline bool __attribute__((always_inline)) vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout)
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{
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return (spinlock_acquire(&mux->spinlock, timeout));
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}
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static inline void __attribute__((always_inline)) vPortCPUReleaseMutex(portMUX_TYPE *mux)
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{
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spinlock_release(&mux->spinlock);
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}
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void vPortEnterCritical(portMUX_TYPE *mux);
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void vPortExitCritical(portMUX_TYPE *mux);
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/*
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* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
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* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
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*/
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BaseType_t xPortInIsrContext(void);
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static inline void __attribute__((always_inline)) vPortEnterCriticalCompliance(portMUX_TYPE *mux)
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{
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if(!xPortInIsrContext()) {
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vPortEnterCritical(mux);
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} else {
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ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__,
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__FUNCTION__);
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abort();
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}
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}
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static inline void __attribute__((always_inline)) vPortExitCriticalCompliance(portMUX_TYPE *mux)
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{
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if(!xPortInIsrContext()) {
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vPortExitCritical(mux);
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} else {
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ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__,
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__FUNCTION__);
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abort();
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}
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}
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#ifdef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
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/* Calling port*_CRITICAL from ISR context would cause an assert failure.
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* If the parent function is called from both ISR and Non-ISR context then call port*_CRITICAL_SAFE
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*/
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#define portENTER_CRITICAL(mux) vPortEnterCriticalCompliance(mux)
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#define portEXIT_CRITICAL(mux) vPortExitCriticalCompliance(mux)
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#else
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#define portENTER_CRITICAL(mux) vPortEnterCritical(mux)
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#define portEXIT_CRITICAL(mux) vPortExitCritical(mux)
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#endif
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#define portENTER_CRITICAL_ISR(mux) vPortEnterCritical(mux)
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#define portEXIT_CRITICAL_ISR(mux) vPortExitCritical(mux)
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static inline void __attribute__((always_inline)) vPortEnterCriticalSafe(portMUX_TYPE *mux)
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{
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if (xPortInIsrContext()) {
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portENTER_CRITICAL_ISR(mux);
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} else {
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portENTER_CRITICAL(mux);
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}
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}
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static inline void __attribute__((always_inline)) vPortExitCriticalSafe(portMUX_TYPE *mux)
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{
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if (xPortInIsrContext()) {
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portEXIT_CRITICAL_ISR(mux);
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} else {
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portEXIT_CRITICAL(mux);
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}
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}
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#define portENTER_CRITICAL_SAFE(mux) vPortEnterCriticalSafe(mux)
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#define portEXIT_CRITICAL_SAFE(mux) vPortExitCriticalSafe(mux)
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/*
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* Wrapper for the Xtensa compare-and-set instruction. This subroutine will atomically compare
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* *addr to 'compare'. If *addr == compare, *addr is set to *set. *set is updated with the previous
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* value of *addr (either 'compare' or some other value.)
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*
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* Warning: From the ISA docs: in some (unspecified) cases, the s32c1i instruction may return the
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* *bitwise inverse* of the old mem if the mem wasn't written. This doesn't seem to happen on the
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* ESP32 (portMUX assertions would fail).
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*/
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static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
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compare_and_set_native(addr, compare, set);
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}
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#define portEXIT_CRITICAL_NESTED(state) do { portbenchmarkINTERRUPT_RESTORE(state); XTOS_RESTORE_JUST_INTLEVEL(state); } while (0)
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// These FreeRTOS versions are similar to the nested versions above
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#define portSET_INTERRUPT_MASK_FROM_ISR() portENTER_CRITICAL_NESTED()
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@@ -343,43 +303,6 @@ static inline unsigned portENTER_CRITICAL_NESTED(void) {
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#define pvPortMallocTcbMem(size) heap_caps_malloc(size, portTcbMemoryCaps)
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#define pvPortMallocStackMem(size) heap_caps_malloc(size, portStackMemoryCaps)
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/*
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* Wrapper for the Xtensa compare-and-set instruction. This subroutine will atomically compare
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* *addr to 'compare'. If *addr == compare, *addr is set to *set. *set is updated with the previous
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* value of *addr (either 'compare' or some other value.)
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*
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* Warning: From the ISA docs: in some (unspecified) cases, the s32c1i instruction may return the
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* *bitwise inverse* of the old mem if the mem wasn't written. This doesn't seem to happen on the
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* ESP32 (portMUX assertions would fail).
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*/
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static inline void uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
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#if XCHAL_HAVE_S32C1I
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__asm__ __volatile__ (
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"WSR %2,SCOMPARE1 \n"
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"S32C1I %0, %1, 0 \n"
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:"=r"(*set)
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:"r"(addr), "r"(compare), "0"(*set)
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);
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#else
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// No S32C1I, so do this by disabling and re-enabling interrupts (slower)
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uint32_t intlevel, old_value;
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__asm__ __volatile__ ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) "\n"
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: "=r"(intlevel));
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old_value = *addr;
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if (old_value == compare) {
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*addr = *set;
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}
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__asm__ __volatile__ ("memw \n"
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"wsr %0, ps\n"
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:: "r"(intlevel));
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*set = old_value;
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#endif
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}
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/*-----------------------------------------------------------*/
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||||
/* Architecture specifics. */
|
||||
@@ -400,14 +323,12 @@ static inline void uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, u
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/* Kernel utilities. */
|
||||
void vPortYield( void );
|
||||
void _frxt_setup_switch( void );
|
||||
#define portYIELD() vPortYield()
|
||||
#define portYIELD_FROM_ISR() {traceISR_EXIT_TO_SCHEDULER(); _frxt_setup_switch();}
|
||||
|
||||
static inline uint32_t xPortGetCoreID(void);
|
||||
|
||||
/* Yielding within an API call (when interrupts are off), means the yield should be delayed
|
||||
until interrupts are re-enabled.
|
||||
|
||||
Reference in New Issue
Block a user