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soc/rtc: update frequency switching APIs to match the master branch
esp32s2 code was based in IDF v3.1, and used outdated APIs. Closes IDF-670
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@@ -86,35 +86,22 @@ void esp_clk_init(void)
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rtc_wdt_protect_on();
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#endif
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uint32_t freq_mhz = CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ;
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rtc_cpu_freq_t freq = RTC_CPU_FREQ_80M;
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switch (freq_mhz) {
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case 240:
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freq = RTC_CPU_FREQ_240M;
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break;
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case 160:
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freq = RTC_CPU_FREQ_160M;
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break;
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case 80:
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freq = RTC_CPU_FREQ_80M;
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break;
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default:
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freq_mhz = 80;
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freq = RTC_CPU_FREQ_80M;
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break;
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}
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rtc_cpu_freq_config_t old_config, new_config;
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rtc_clk_cpu_freq_get_config(&old_config);
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const uint32_t old_freq_mhz = old_config.freq_mhz;
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const uint32_t new_freq_mhz = CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ;
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bool res = rtc_clk_cpu_freq_mhz_to_config(new_freq_mhz, &new_config);
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assert(res);
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// Wait for UART TX to finish, otherwise some UART output will be lost
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// when switching APB frequency
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uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
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uint32_t freq_before = rtc_clk_cpu_freq_value(rtc_clk_cpu_freq_get()) / MHZ ;
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rtc_clk_cpu_freq_set(freq);
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rtc_clk_cpu_freq_set_config(&new_config);
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// Re calculate the ccount to make time calculation correct.
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uint32_t freq_after = CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ;
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XTHAL_SET_CCOUNT( XTHAL_GET_CCOUNT() * freq_after / freq_before );
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XTHAL_SET_CCOUNT( (uint64_t)XTHAL_GET_CCOUNT() * new_freq_mhz / old_freq_mhz );
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}
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int IRAM_ATTR esp_clk_cpu_freq(void)
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