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soc/rtc: update frequency switching APIs to match the master branch
esp32s2 code was based in IDF v3.1, and used outdated APIs. Closes IDF-670
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@@ -476,7 +476,7 @@ static void esp_panic_dig_reset(void)
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// make sure all the panic handler output is sent from UART FIFO
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uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
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// switch to XTAL (otherwise we will keep running from the PLL)
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rtc_clk_cpu_freq_set(RTC_CPU_FREQ_XTAL);
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rtc_clk_cpu_freq_set_xtal();
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// reset the digital part
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esp_cpu_unstall(PRO_CPU_NUM);
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SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
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