alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-10-03 20:17:34 +00:00
Code Issues Packages Projects Releases Wiki Activity

feat(clk): Add 120M pll clock support

Browse Source
This commit is contained in:
C.S.M
2025-07-08 18:59:31 +08:00
parent 4e7bfc3217
commit 752c9fc805
4 changed files with 24 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
components/esp_hw_support/port/esp32p4/esp_clk_tree.c
View File

@@ -38,6 +38,9 @@ esp_err_t esp_clk_tree_src_get_freq_hz(soc_module_clk_t clk_src, esp_clk_tree_sr
case SOC_MOD_CLK_PLL_F80M:
clk_src_freq = CLK_LL_PLL_80M_FREQ_MHZ * MHZ;
break;
case SOC_MOD_CLK_PLL_F120M:
clk_src_freq = CLK_LL_PLL_120M_FREQ_MHZ * MHZ;
break;
case SOC_MOD_CLK_PLL_F160M:
clk_src_freq = CLK_LL_PLL_160M_FREQ_MHZ * MHZ;
break;
@@ -126,6 +129,9 @@ esp_err_t esp_clk_tree_enable_src(soc_module_clk_t clk_src, bool enable)
case SOC_MOD_CLK_PLL_F80M:
clk_gate_ll_ref_80m_clk_en(enable);
break;
case SOC_MOD_CLK_PLL_F120M:
clk_gate_ll_ref_120m_clk_en(enable);
break;
case SOC_MOD_CLK_PLL_F160M:
clk_gate_ll_ref_160m_clk_en(enable);
break;