mirror of
https://github.com/espressif/esp-idf.git
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bootloader/flash_encrypt: added esp32s2 flash encryption code on build system and enabled example
flash_enctryption: enabled flash encryption example on esp32s2 bootloader: raise WDT overflow value providing sufficient interval to encrypt app partition flash_ encrypt: Fixed the TODOs on flash encryption key generation for esp32s2 flash_encryption: added secure boot features to flash enctryption for esp32s2 bootloader: leave only esp32s2 compatible potentially insecure options on menuconfig. flash_encryption: removed secure boot version 1 from esp32s2 encryption code flash_encryption: added CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED option for esp32s2 flash_encryption: fixed the count of left plaintext flash flash_encryption: disable dcache and icache download when using encryption in release mode flash_encryption: add cache potentally insecure options for s2 chips flash_encryption: fixed bug which bricked some chips in relase mode
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@@ -20,6 +20,14 @@
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#include "esp_flash_encrypt.h"
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#include "esp_secure_boot.h"
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#if CONFIG_IDF_TARGET_ESP32
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#define CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT
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#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
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#define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT
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#endif
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#ifndef BOOTLOADER_BUILD
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static const char *TAG = "flash_encrypt";
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@@ -34,7 +42,7 @@ void esp_flash_encryption_init_checks()
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#ifdef CONFIG_SECURE_BOOT
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if (esp_secure_boot_enabled() && esp_flash_encryption_enabled()) {
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uint8_t flash_crypt_cnt_wr_dis = 0;
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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if (!flash_crypt_cnt_wr_dis) {
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ESP_EARLY_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now...");
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esp_flash_write_protect_crypt_cnt();
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@@ -62,22 +70,33 @@ void esp_flash_encryption_init_checks()
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void esp_flash_write_protect_crypt_cnt(void)
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{
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uint8_t flash_crypt_cnt_wr_dis = 0;
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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esp_efuse_read_field_blob(CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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if (!flash_crypt_cnt_wr_dis) {
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esp_efuse_write_field_cnt(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, 1);
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esp_efuse_write_field_cnt(WR_DIS_CRYPT_CNT, 1);
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}
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}
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esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
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{
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uint8_t efuse_flash_crypt_cnt_wr_protected = 0;
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#if CONFIG_IDF_TARGET_ESP32
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uint8_t dis_dl_enc = 0, dis_dl_dec = 0, dis_dl_cache = 0;
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#elif CONFIG_IDF_TARGET_ESP32S2
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uint8_t dis_dl_enc = 0;
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uint32_t dis_dl_cache = 0;
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#endif
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esp_flash_enc_mode_t mode = ESP_FLASH_ENC_MODE_DEVELOPMENT;
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if (esp_flash_encryption_enabled()) {
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/* Check if FLASH CRYPT CNT is write protected */
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &efuse_flash_crypt_cnt_wr_protected, 1);
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esp_efuse_read_field_blob(WR_DIS_CRYPT_CNT, &efuse_flash_crypt_cnt_wr_protected, 1);
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if (efuse_flash_crypt_cnt_wr_protected) {
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#if CONFIG_IDF_TARGET_ESP32
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esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_CACHE, &dis_dl_cache, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_ENCRYPT, &dis_dl_enc, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DISABLE_DL_DECRYPT, &dis_dl_dec, 1);
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@@ -85,6 +104,15 @@ esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
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if ( dis_dl_cache && dis_dl_enc && dis_dl_dec ) {
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mode = ESP_FLASH_ENC_MODE_RELEASE;
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}
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#elif CONFIG_IDF_TARGET_ESP32S2
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esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT, &dis_dl_enc, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_ICACHE, &dis_dl_cache, 1);
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esp_efuse_read_field_blob(ESP_EFUSE_DIS_DOWNLOAD_DCACHE, &dis_dl_cache, 1);
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if (dis_dl_enc && (dis_dl_cache & (EFUSE_DIS_DOWNLOAD_DCACHE | EFUSE_DIS_DOWNLOAD_ICACHE))) {
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mode = ESP_FLASH_ENC_MODE_RELEASE;
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}
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#endif
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}
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} else {
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mode = ESP_FLASH_ENC_MODE_DISABLED;
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