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Merge branch 'esp32p4/add_adc_support' into 'master'

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feat(adc): support ADC oneshot/continuous mode on ESP32P4

Closes IDF-6496 and IDF-6497

See merge request espressif/esp-idf!28281
This commit is contained in:
Gao Xu
2024-06-05 16:31:59 +08:00
parent 4e5c837b5d 795f3fe377
commit 78c40fd19a
51 changed files with 1604 additions and 190 deletions
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24
components/hal/esp32/include/hal/adc_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -31,6 +31,7 @@ extern "C" {
#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM) (1)
#define ADC_LL_SAR_CLK_DIV_DEFAULT(PERIPH_NUM) (1)
#define ADC_LL_DELAY_CYCLE_AFTER_DONE_SIGNAL (0)
#define ADC_LL_RTC_GPIO_SUPPORTED (1)
/*---------------------------------------------------------------
DMA
@@ -229,7 +230,7 @@ static inline void adc_ll_digi_set_pattern_table_len(adc_unit_t adc_n, uint32_t
}
/**
* Set pattern table lenth for digital controller.
* Set pattern table length for digital controller.
* The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, in which channel selection,
* resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the
* pattern table one by one. For each controller the scan sequence has at most 16 different rules before repeating itself.
@@ -564,6 +565,25 @@ static inline void adc_oneshot_ll_disable_all_unit(void)
/*---------------------------------------------------------------
Common setting
---------------------------------------------------------------*/
/**
* @brief Enable the ADC clock
* @param enable true to enable, false to disable
*/
static inline void adc_ll_enable_bus_clock(bool enable)
{
(void)enable;
//For compatibility
}
/**
* @brief Reset ADC module
*/
static inline void adc_ll_reset_register(void)
{
//For compatibility
}
/**
* Set ADC module controller.
* There are five SAR ADC controllers: