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gpio:support gpio in/out/interrupt for esp32s3(728)

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Add support of gpio for esp32s3(728). Adjust some pins and comments in test_gpio.c. Add support for gpio functions for gpio19 and gpio20. Update S3 programming guide Peripheral API: gpio and sigmadelta. Add unit test for input and output function of S3 USB pins(GPIO19 and GPIO20) and C3 USB pins(GPIO18 and GPIO19). Adjust input only test in test_spi_master.c.
This commit is contained in:
bizhuangyang
2021-06-09 17:18:39 +08:00
parent afc2bc94b3
commit 78c67d2384
10 changed files with 512 additions and 388 deletions
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10
components/soc/esp32s3/include/soc/gpio_caps.h
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@@ -20,17 +20,17 @@ extern "C" {
// ESP32-S3 has 1 GPIO peripheral
#define SOC_GPIO_PORT (1)
#define SOC_GPIO_PIN_COUNT (48)
#define SOC_GPIO_PIN_COUNT (49)
// On ESP32-S3, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)
// Force hold is a new function of ESP32-S3
#define SOC_GPIO_SUPPORT_FORCE_HOLD (1)
// 0~47 except from 22~25 are valid
#define SOC_GPIO_VALID_GPIO_MASK (0xFFFFFFFFFFFFULL & ~(0ULL | BIT22 | BIT23 | BIT24 | BIT25))
// GPIO 46 is input only
#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK (SOC_GPIO_VALID_GPIO_MASK & ~(0ULL | BIT46))
// 0~48 except from 22~25 are valid
#define SOC_GPIO_VALID_GPIO_MASK (0x1FFFFFFFFFFFFULL & ~(0ULL | BIT22 | BIT23 | BIT24 | BIT25))
// No GPIO is input only
#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK (SOC_GPIO_VALID_GPIO_MASK)
#ifdef __cplusplus