alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-09 12:35:28 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'feature/add_esp32c6_g0_components' into 'master'

Browse Source 
ESP32C6: Add G0 components support (hal, soc, riscv, esp_common)

See merge request espressif/esp-idf!19826
This commit is contained in:
morris
2022-09-01 16:11:40 +08:00
parent 5e47c7ce13 06b517efcb
commit 7b2c491064
114 changed files with 11631 additions and 296 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
components/soc/esp32s3/include/soc/hwcrypto_reg.h
View File

@@ -70,7 +70,7 @@
#define AES_BLOCK_NUM_REG ((DR_REG_AES_BASE) + 0x98)
#define AES_INC_SEL_REG ((DR_REG_AES_BASE) + 0x9C)
#define AES_CONTINUE_REG ((DR_REG_AES_BASE) + 0xA8)
#define AES_INT_CLR_REG ((DR_REG_AES_BASE) + 0xAC)
#define AES_INT_CLEAR_REG ((DR_REG_AES_BASE) + 0xAC)
#define AES_INT_ENA_REG ((DR_REG_AES_BASE) + 0xB0)
#define AES_DATE_REG ((DR_REG_AES_BASE) + 0xB4)
#define AES_DMA_EXIT_REG ((DR_REG_AES_BASE) + 0xB8)

24
components/soc/esp32s3/include/soc/interrupt_reg.h
View File

@@ -1,22 +1,16 @@
// Copyright 2017-2021 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_INTERRUPT_REG_H_
#define _SOC_INTERRUPT_REG_H_
#include "interrupt_core0_reg.h"
#include "interrupt_core1_reg.h"
#include "soc/interrupt_core0_reg.h"
#include "soc/interrupt_core1_reg.h"
#include "soc.h"
#ifdef __cplusplus
extern "C" {
#endif

20
components/soc/esp32s3/rtc_io_periph.c
View File

@@ -1,18 +1,10 @@
// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "soc/rtc_io_periph.h"
#include "soc/rtc_periph.h"
const int rtc_io_num_map[SOC_GPIO_PIN_COUNT] = {
RTCIO_GPIO0_CHANNEL, //GPIO0