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Merge branch 'esp32c5/add_adc_support' into 'master'

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ADC: bringup ADC oneshot and continuous mode on C5

Closes IDF-8701 and IDF-8703

See merge request espressif/esp-idf!31940
This commit is contained in:
Gao Xu
2024-07-17 16:46:52 +08:00
parent 2afbcd1bb4 2f49a2e9c8
commit 7d3ac1abe4
29 changed files with 1055 additions and 62 deletions
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46
components/soc/esp32c5/include/soc/soc_caps.h
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@@ -17,7 +17,7 @@
#pragma once
/*-------------------------- COMMON CAPS ---------------------------------------*/
// #define SOC_ADC_SUPPORTED 1 // TODO: [ESP32C5] IDF-8701
#define SOC_ADC_SUPPORTED 1
// #define SOC_DEDICATED_GPIO_SUPPORTED 1 // TODO: [ESP32C5] IDF-8725
#define SOC_UART_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
@@ -94,32 +94,32 @@
/*-------------------------- ADC CAPS -------------------------------*/
/*!< SAR ADC Module*/
// #define SOC_ADC_DIG_CTRL_SUPPORTED 1
// #define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1
// #define SOC_ADC_MONITOR_SUPPORTED 1
// #define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit
// #define SOC_ADC_DMA_SUPPORTED 1
#define SOC_ADC_DIG_CTRL_SUPPORTED 1
#define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1
#define SOC_ADC_MONITOR_SUPPORTED 1
#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit
#define SOC_ADC_DMA_SUPPORTED 1
#define SOC_ADC_PERIPH_NUM (1U)
// #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (7)
#define SOC_ADC_MAX_CHANNEL_NUM (7)
// #define SOC_ADC_ATTEN_NUM (4)
#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (6)
#define SOC_ADC_MAX_CHANNEL_NUM (6)
#define SOC_ADC_ATTEN_NUM (4)
/*!< Digital */
// #define SOC_ADC_DIGI_CONTROLLER_NUM (1U)
// #define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */
// #define SOC_ADC_DIGI_MAX_BITWIDTH (12)
// #define SOC_ADC_DIGI_MIN_BITWIDTH (12)
// #define SOC_ADC_DIGI_IIR_FILTER_NUM (2)
// #define SOC_ADC_DIGI_MONITOR_NUM (2)
// #define SOC_ADC_DIGI_RESULT_BYTES (4)
// #define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4)
#define SOC_ADC_DIGI_CONTROLLER_NUM (1U)
#define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */
#define SOC_ADC_DIGI_MAX_BITWIDTH (12)
#define SOC_ADC_DIGI_MIN_BITWIDTH (12)
#define SOC_ADC_DIGI_IIR_FILTER_NUM (2)
#define SOC_ADC_DIGI_MONITOR_NUM (2)
#define SOC_ADC_DIGI_RESULT_BYTES (4)
#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4)
/*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval <= 4095 */
// #define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
// #define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
/*!< RTC */
// #define SOC_ADC_RTC_MIN_BITWIDTH (12)
// #define SOC_ADC_RTC_MAX_BITWIDTH (12)
#define SOC_ADC_RTC_MIN_BITWIDTH (12)
#define SOC_ADC_RTC_MAX_BITWIDTH (12)
/*!< Calibration */
// #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
@@ -127,10 +127,10 @@
// #define SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED (1) /*!< support channel compensation to the HW offset calibration */
/*!< Interrupt */
// #define SOC_ADC_TEMPERATURE_SHARE_INTR (1)
// #define SOC_ADC_TEMPERATURE_SHARE_INTR (1) // TODO: [ESP32C5] IDF-8727
/*!< ADC power control is shared by PWDET */
// #define SOC_ADC_SHARED_POWER 1
#define SOC_ADC_SHARED_POWER 1
// ESP32C5-TODO: Copy from esp32C5, need check
/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/