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fixed incorrect Tx power mappings for ESP32C3 chip

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This commit is contained in:
wangmengyang
2021-03-16 20:36:05 +08:00
committed by bot
parent f00d7ee9d0
commit 7dd5568cb7
4 changed files with 98 additions and 31 deletions
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42
components/bt/controller/esp32c3/Kconfig.in
View File

@@ -126,10 +126,20 @@ config BT_CTRL_RX_ANTENNA_INDEX_EFF
choice BT_CTRL_DFT_TX_POWER_LEVEL
prompt "BLE default Tx power level"
default BT_CTRL_DFT_TX_POWER_LEVEL_P9
default BT_CTRL_DFT_TX_POWER_LEVEL_P3
help
Specify default Tx power level
config BT_CTRL_DFT_TX_POWER_LEVEL_N27
bool "-27dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_N24
bool "-24dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_N21
bool "-21dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_N18
bool "-18dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_N15
bool "-15dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_N12
bool "-12dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_N9
@@ -146,18 +156,32 @@ choice BT_CTRL_DFT_TX_POWER_LEVEL
bool "+6dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_P9
bool "+9dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_P12
bool "+12dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_P15
bool "+15dBm"
config BT_CTRL_DFT_TX_POWER_LEVEL_P18
bool "+18dBm"
endchoice
config BT_CTRL_DFT_TX_POWER_LEVEL_EFF
int
default 0 if BT_CTRL_DFT_TX_POWER_LEVEL_N12
default 1 if BT_CTRL_DFT_TX_POWER_LEVEL_N9
default 2 if BT_CTRL_DFT_TX_POWER_LEVEL_N6
default 3 if BT_CTRL_DFT_TX_POWER_LEVEL_N3
default 4 if BT_CTRL_DFT_TX_POWER_LEVEL_N0
default 5 if BT_CTRL_DFT_TX_POWER_LEVEL_P3
default 6 if BT_CTRL_DFT_TX_POWER_LEVEL_P6
default 7 if BT_CTRL_DFT_TX_POWER_LEVEL_P9
default 0 if BT_CTRL_DFT_TX_POWER_LEVEL_N27
default 1 if BT_CTRL_DFT_TX_POWER_LEVEL_N24
default 2 if BT_CTRL_DFT_TX_POWER_LEVEL_N21
default 3 if BT_CTRL_DFT_TX_POWER_LEVEL_N18
default 4 if BT_CTRL_DFT_TX_POWER_LEVEL_N15
default 5 if BT_CTRL_DFT_TX_POWER_LEVEL_N12
default 6 if BT_CTRL_DFT_TX_POWER_LEVEL_N9
default 7 if BT_CTRL_DFT_TX_POWER_LEVEL_N6
default 8 if BT_CTRL_DFT_TX_POWER_LEVEL_N3
default 9 if BT_CTRL_DFT_TX_POWER_LEVEL_N0
default 10 if BT_CTRL_DFT_TX_POWER_LEVEL_P3
default 11 if BT_CTRL_DFT_TX_POWER_LEVEL_P6
default 12 if BT_CTRL_DFT_TX_POWER_LEVEL_P9
default 13 if BT_CTRL_DFT_TX_POWER_LEVEL_P12
default 14 if BT_CTRL_DFT_TX_POWER_LEVEL_P15
default 15 if BT_CTRL_DFT_TX_POWER_LEVEL_P18
default 0
config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP

46
components/bt/controller/esp32c3/bt.c
View File

@@ -212,6 +212,7 @@ extern void btdm_controller_disable(void);
extern uint8_t btdm_controller_get_mode(void);
extern const char *btdm_controller_get_compile_version(void);
extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
/* Sleep */
extern void btdm_controller_enable_sleep(bool enable);
extern uint8_t btdm_controller_get_sleep_mode(void);
@@ -1334,14 +1335,51 @@ esp_bt_controller_status_t esp_bt_controller_get_status(void)
/* extra functions */
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
{
ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
return ESP_OK;
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
if (ble_txpwr_set(power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
default:
stat = ESP_ERR_NOT_SUPPORTED;
break;
}
return stat;
}
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
{
ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return 0", __func__);
return 0;
esp_power_level_t lvl;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
lvl = (esp_power_level_t)ble_txpwr_get(power_type);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
case ESP_BLE_PWR_TYPE_CONN_HDL3:
case ESP_BLE_PWR_TYPE_CONN_HDL4:
case ESP_BLE_PWR_TYPE_CONN_HDL5:
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
case ESP_BLE_PWR_TYPE_DEFAULT:
lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
break;
default:
lvl = ESP_PWR_LVL_INVALID;
break;
}
return lvl;
}
esp_err_t esp_bt_sleep_enable (void)

2
components/bt/controller/lib

Submodule components/bt/controller/lib updated: 5ba6226876...ea1a71ba05

39
components/bt/include/esp32c3/include/esp_bt.h
View File

@@ -26,7 +26,7 @@ extern "C" {
#endif
#define ESP_BT_CTRL_CONFIG_MAGIC_VAL 0x5A5AA5A5
#define ESP_BT_CTRL_CONFIG_VERSION 0x02101290
#define ESP_BT_CTRL_CONFIG_VERSION 0x02103080
#define ESP_BT_HCI_TL_MAGIC_VALUE 0xfadebead
#define ESP_BT_HCI_TL_VERSION 0x00010000
@@ -133,6 +133,8 @@ enum {
#define CFG_NASK CFG_MASK_BIT_SCAN_DUPLICATE_OPTION
#define BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0 (0x01010000)
#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \
.magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL, \
.version = ESP_BT_CTRL_CONFIG_VERSION, \
@@ -158,6 +160,7 @@ enum {
.normal_adv_size = NORMAL_SCAN_DUPLICATE_CACHE_SIZE, \
.mesh_adv_size = MESH_DUPLICATE_SCAN_CACHE_SIZE, \
.coex_phy_coded_tx_rx_time_limit = CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
.hw_target_code = BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0, \
};
#else
@@ -221,6 +224,7 @@ typedef struct {
uint16_t normal_adv_size; /*!< Normal adv size for scan duplicate */
uint16_t mesh_adv_size; /*!< Mesh adv size for scan duplicate */
uint8_t coex_phy_coded_tx_rx_time_limit; /*!< limit on max tx/rx time in case of connection using CODED-PHY with Wi-Fi coexistence */
uint32_t hw_target_code; /*!< hardware target */
} esp_bt_controller_config_t;
/**
@@ -263,22 +267,23 @@ typedef enum {
* @brief Bluetooth TX power level(index), it's just a index corresponding to power(dbm).
*/
typedef enum {
ESP_PWR_LVL_N12 = 0, /*!< Corresponding to -12dbm */
ESP_PWR_LVL_N9 = 1, /*!< Corresponding to -9dbm */
ESP_PWR_LVL_N6 = 2, /*!< Corresponding to -6dbm */
ESP_PWR_LVL_N3 = 3, /*!< Corresponding to -3dbm */
ESP_PWR_LVL_N0 = 4, /*!< Corresponding to 0dbm */
ESP_PWR_LVL_P3 = 5, /*!< Corresponding to +3dbm */
ESP_PWR_LVL_P6 = 6, /*!< Corresponding to +6dbm */
ESP_PWR_LVL_P9 = 7, /*!< Corresponding to +9dbm */
ESP_PWR_LVL_N14 = ESP_PWR_LVL_N12, /*!< Backward compatibility! Setting to -14dbm will actually result to -12dbm */
ESP_PWR_LVL_N11 = ESP_PWR_LVL_N9, /*!< Backward compatibility! Setting to -11dbm will actually result to -9dbm */
ESP_PWR_LVL_N8 = ESP_PWR_LVL_N6, /*!< Backward compatibility! Setting to -8dbm will actually result to -6dbm */
ESP_PWR_LVL_N5 = ESP_PWR_LVL_N3, /*!< Backward compatibility! Setting to -5dbm will actually result to -3dbm */
ESP_PWR_LVL_N2 = ESP_PWR_LVL_N0, /*!< Backward compatibility! Setting to -2dbm will actually result to 0dbm */
ESP_PWR_LVL_P1 = ESP_PWR_LVL_P3, /*!< Backward compatibility! Setting to +1dbm will actually result to +3dbm */
ESP_PWR_LVL_P4 = ESP_PWR_LVL_P6, /*!< Backward compatibility! Setting to +4dbm will actually result to +6dbm */
ESP_PWR_LVL_P7 = ESP_PWR_LVL_P9, /*!< Backward compatibility! Setting to +7dbm will actually result to +9dbm */
ESP_PWR_LVL_N27 = 0, /*!< Corresponding to -27dbm */
ESP_PWR_LVL_N24 = 1, /*!< Corresponding to -24dbm */
ESP_PWR_LVL_N21 = 2, /*!< Corresponding to -21dbm */
ESP_PWR_LVL_N18 = 3, /*!< Corresponding to -18dbm */
ESP_PWR_LVL_N15 = 4, /*!< Corresponding to -15dbm */
ESP_PWR_LVL_N12 = 5, /*!< Corresponding to -12dbm */
ESP_PWR_LVL_N9 = 6, /*!< Corresponding to -9dbm */
ESP_PWR_LVL_N6 = 7, /*!< Corresponding to -6dbm */
ESP_PWR_LVL_N3 = 8, /*!< Corresponding to -3dbm */
ESP_PWR_LVL_N0 = 9, /*!< Corresponding to 0dbm */
ESP_PWR_LVL_P3 = 10, /*!< Corresponding to +3dbm */
ESP_PWR_LVL_P6 = 11, /*!< Corresponding to +6dbm */
ESP_PWR_LVL_P9 = 12, /*!< Corresponding to +9dbm */
ESP_PWR_LVL_P12 = 13, /*!< Corresponding to +12dbm */
ESP_PWR_LVL_P15 = 14, /*!< Corresponding to +15dbm */
ESP_PWR_LVL_P18 = 15, /*!< Corresponding to +18dbm */
ESP_PWR_LVL_INVALID = 0xFF, /*!< Indicates an invalid value */
} esp_power_level_t;
/**