feat(esp_system): allow .bss to spill over into L2MEM above 0x4ff40000

This commit introduce SOC_MEM_NON_CONTIGUOUS_SRAM flag (that enebled for
esp32p4). If SOC_MEM_NON_CONTIGUOUS_SRAM is enabled:

- LDFLAGS+=--enable-non-contiguous-regions
- ldgen.py replaces "arrays[*]" from sections.ld.in with objects under
  SURROUND keyword. (e.g. from linker.lf: data -> dram0_data SURROUND(foo))
- "mapping[*]" - refers to all other data

If SOC_MEM_NON_CONTIGUOUS_SRAM, sections.ld.in file should contain at
least one block of code like this (otherwise it does not make sense):

  .dram0.bss (NOLOAD) :
  {
    arrays[dram0_bss]
    mapping[dram0_bss]
  } > sram_low

  .dram1.bss (NOLOAD) :
  {
    /* do not place here arrays[dram0_bss] because it may be splited
     * between segments */
    mapping[dram0_bss]
  } > sram_high

components/esp_system/ld/esp32c2/sections.ld.in

@@ -4,6 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+#include "ld.common"
+
 /* Default entry point */
 ENTRY(call_start_cpu0);
 
@@ -93,20 +95,9 @@ SECTIONS
     . = ALIGN (8);
     _bss_start = ABSOLUTE(.);
 
+    /* ldgen places all bss-related data to mapping[dram0_bss] (See esp_system/app.lf). */
     mapping[dram0_bss]
 
-    *(.dynsbss)
-    *(.sbss)
-    *(.sbss.*)
-    *(.gnu.linkonce.sb.*)
-    *(.scommon)
-    *(.sbss2)
-    *(.sbss2.*)
-    *(.gnu.linkonce.sb2.*)
-    *(.dynbss)
-    *(.share.mem)
-    *(.gnu.linkonce.b.*)
-
     . = ALIGN (8);
     _bss_end = ABSOLUTE(.);
   } > dram0_0_seg
@@ -174,7 +165,8 @@ SECTIONS
      * section will match .flash.rodata's begin address. Thus, both sections
      * will be merged when creating the final bin image. */
     . = ALIGN(ALIGNOF(.flash.rodata));
-  } >default_rodata_seg
+  } > default_rodata_seg
+  ASSERT_SECTIONS_GAP(.flash.appdesc, .flash.rodata)
 
   .flash.rodata : ALIGN(0x10)
   {
@@ -234,7 +226,12 @@ SECTIONS
     *(.lit4.*)
     *(.gnu.linkonce.lit4.*)
     _lit4_end = ABSOLUTE(.);
-    . = ALIGN(4);
+    . = ALIGN(ALIGNOF(.flash.tls));
+  } > default_rodata_seg
+  ASSERT_SECTIONS_GAP(.flash.rodata, .flash.tls)
+
+  .flash.tls : ALIGN(8)
+  {
     _thread_local_start = ABSOLUTE(.);
     *(.tdata)
     *(.tdata.*)
@@ -243,6 +240,7 @@ SECTIONS
     _thread_local_end = ABSOLUTE(.);
     . = ALIGN(ALIGNOF(.eh_frame));
   } > default_rodata_seg
+  ASSERT_SECTIONS_GAP(.flash.tls, .eh_frame)
 
   /* Keep this section shall be at least aligned on 4 */
   .eh_frame : ALIGN(8)
@@ -254,6 +252,7 @@ SECTIONS
      * them adjacent. */
     . = ALIGN(ALIGNOF(.eh_frame_hdr));
   } > default_rodata_seg
+  ASSERT_SECTIONS_GAP(.eh_frame, .eh_frame_hdr)
 
   /* To avoid any exception in C++ exception frame unwinding code, this section
    * shall be aligned on 8. */