mirror of
https://github.com/espressif/esp-idf.git
synced 2025-09-13 17:43:27 +00:00
spi_flash: fix LL of esp32s3 and add 32-bit support
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@@ -57,7 +57,7 @@ typedef typeof(GPSPI2.clock) gpspi_flash_ll_clock_reg_t;
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* Control
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*----------------------------------------------------------------------------*/
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/**
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* Reset peripheral registers before configuration and starting control
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* Reset peripheral registers before configuration and starting control.
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*
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* @param dev Beginning address of the peripheral registers.
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*/
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@@ -65,6 +65,15 @@ static inline void gpspi_flash_ll_reset(spi_dev_t *dev)
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{
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dev->user.val = 0;
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dev->ctrl.val = 0;
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dev->clk_gate.clk_en = 1;
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dev->clk_gate.mst_clk_active = 1;
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dev->clk_gate.mst_clk_sel = 1;
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dev->dma_conf.val = 0;
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dev->dma_conf.tx_seg_trans_clr_en = 1;
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dev->dma_conf.rx_seg_trans_clr_en = 1;
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dev->dma_conf.dma_seg_trans_en = 0;
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}
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/**
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@@ -144,6 +153,8 @@ static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *bu
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*/
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static inline void gpspi_flash_ll_user_start(spi_dev_t *dev)
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{
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dev->cmd.update = 1;
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while (dev->cmd.update);
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dev->cmd.usr = 1;
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}
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@@ -156,7 +167,7 @@ static inline void gpspi_flash_ll_user_start(spi_dev_t *dev)
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*/
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static inline bool gpspi_flash_ll_host_idle(const spi_dev_t *dev)
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{
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return false;
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return dev->cmd.usr == 0;
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}
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/**
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@@ -203,10 +214,10 @@ static inline void gpspi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mod
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ctrl.val &= ~(SPI_FCMD_QUAD_M | SPI_FADDR_QUAD_M | SPI_FREAD_QUAD_M | SPI_FCMD_DUAL_M | SPI_FADDR_DUAL_M | SPI_FREAD_DUAL_M);
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user.val &= ~(SPI_FWRITE_QUAD_M | SPI_FWRITE_DUAL_M);
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// ctrl.val |= SPI_FAST_RD_MODE_M;
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switch (read_mode) {
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case SPI_FLASH_FASTRD:
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//the default option
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case SPI_FLASH_SLOWRD:
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break;
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case SPI_FLASH_QIO:
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ctrl.fread_quad = 1;
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@@ -226,9 +237,6 @@ static inline void gpspi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mod
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ctrl.fread_dual = 1;
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user.fwrite_dual = 1;
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break;
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// case SPI_FLASH_SLOWRD:
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// ctrl.fast_rd_mode = 0;
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// break;
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default:
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abort();
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}
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@@ -257,6 +265,9 @@ static inline void gpspi_flash_ll_set_clock(spi_dev_t *dev, gpspi_flash_ll_clock
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static inline void gpspi_flash_ll_set_miso_bitlen(spi_dev_t *dev, uint32_t bitlen)
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{
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dev->user.usr_miso = bitlen > 0;
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if (bitlen) {
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dev->ms_dlen.ms_data_bitlen = bitlen - 1;
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}
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}
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/**
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@@ -269,20 +280,24 @@ static inline void gpspi_flash_ll_set_miso_bitlen(spi_dev_t *dev, uint32_t bitle
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static inline void gpspi_flash_ll_set_mosi_bitlen(spi_dev_t *dev, uint32_t bitlen)
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{
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dev->user.usr_mosi = bitlen > 0;
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if (bitlen) {
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dev->ms_dlen.ms_data_bitlen = bitlen - 1;
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}
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}
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/**
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* Set the command with fixed length (8 bits).
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* Set the command.
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*
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* @param dev Beginning address of the peripheral registers.
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* @param command Command to send
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* @param bitlen Length of the command
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*/
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static inline void gpspi_flash_ll_set_command8(spi_dev_t *dev, uint8_t command)
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static inline void gpspi_flash_ll_set_command(spi_dev_t *dev, uint8_t command, uint32_t bitlen)
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{
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dev->user.usr_command = 1;
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typeof(dev->user2) user2 = {
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.usr_command_value = command,
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.usr_command_bitlen = (8 - 1),
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.usr_command_bitlen = (bitlen - 1),
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};
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dev->user2 = user2;
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}
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@@ -318,9 +333,12 @@ static inline void gpspi_flash_ll_set_addr_bitlen(spi_dev_t *dev, uint32_t bitle
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*/
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static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen)
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{
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dev->addr = (addr << (32 - bitlen));
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// The blank region should be all ones
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uint32_t padding_ones = (bitlen == 32? 0 : UINT32_MAX >> bitlen);
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dev->addr = (addr << (32 - bitlen)) | padding_ones;
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}
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/**
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* Set the address to send. Should be called before commands that requires the address e.g. erase sector, read, write...
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*
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@@ -358,6 +376,12 @@ static inline void gpspi_flash_ll_set_dummy_out(spi_dev_t *dev, uint32_t out_en,
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dev->ctrl.d_pol = out_lev;
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}
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static inline void gpspi_flash_ll_set_hold(spi_dev_t *dev, uint32_t hold_n)
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{
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dev->user1.cs_hold_time = hold_n - 1;
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dev->user.cs_hold = (hold_n > 0? 1: 0);
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}
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#ifdef __cplusplus
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}
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#endif
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