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rgb_lcd: support fractional clock divisor
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@@ -1,13 +1,65 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/lcd_hal.h"
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#include "hal/lcd_ll.h"
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#include "hal/log.h"
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void lcd_hal_init(lcd_hal_context_t *hal, int id)
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{
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hal->dev = LCD_LL_GET_HW(id);
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}
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/**
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* @brief helper function, calculate the Greatest Common Divisor
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* @note gcd(a, b) = gcd(b, a % b)
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* @param a bigger value
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* @param b smaller value
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* @return result of gcd(a, b)
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*/
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static inline uint32_t _gcd(uint32_t a, uint32_t b)
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{
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uint32_t c = a % b;
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while (c != 0) {
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a = b;
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b = c;
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c = a % b;
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}
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return b;
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}
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uint32_t lcd_hal_cal_pclk_freq(lcd_hal_context_t *hal, uint32_t src_freq_hz, uint32_t expect_pclk_freq_hz)
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{
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// lcd_clk = module_clock_src / (n + b / a)
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// pixel_clk = lcd_clk / mo
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uint32_t mo = src_freq_hz / expect_pclk_freq_hz / LCD_LL_CLK_FRAC_DIV_N_MAX + 1;
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uint32_t n = src_freq_hz / expect_pclk_freq_hz / mo;
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uint32_t a = 0;
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uint32_t b = 0;
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// delta_hz / expect_pclk_freq_hz <==> b / a
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uint32_t delta_hz = src_freq_hz - expect_pclk_freq_hz * mo * n;
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// fractional divider
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if (delta_hz) {
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uint32_t gcd = _gcd(expect_pclk_freq_hz, delta_hz);
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a = expect_pclk_freq_hz / gcd;
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b = delta_hz / gcd;
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// normalize div_a and div_b
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uint32_t d = a / LCD_LL_CLK_FRAC_DIV_AB_MAX + 1;
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a /= d;
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b /= d;
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}
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HAL_LOGD("lcd_hal", "n=%d,a=%d,b=%d,mo=%d", n, a, b, mo);
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lcd_ll_set_group_clock_coeff(hal->dev, n, a, b);
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lcd_ll_set_pixel_clock_prescale(hal->dev, mo);
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if (delta_hz) {
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return ((uint64_t)src_freq_hz * a) / (n * a + b) / mo;
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} else {
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return src_freq_hz / n / mo;
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}
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}
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