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Merge branch 'bugfix/rtc_8md256_deepsleep_time_esp32' into 'master'

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pm: Fixed sleep time inaccurate bug when select 8MD256 as rtc slow clock on ESP32

Closes IDFGH-4893

See merge request espressif/esp-idf!21558
This commit is contained in:
Michael (XIAO Xufeng)
2022-12-28 15:30:01 +08:00
parent a74ae7fba7 a0ed82525e
commit 84a6c6f7d9
3 changed files with 5 additions and 1 deletions
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1
components/soc/esp32/include/soc/rtc.h
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@@ -507,6 +507,7 @@ typedef struct rtc_sleep_config_s {
uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep
uint32_t deep_slp_reject : 1; //!< enable deep sleep reject
uint32_t light_slp_reject : 1; //!< enable light sleep reject
uint32_t dbg_atten_slp : 2; //!< voltage parameter
} rtc_sleep_config_t;
#define RTC_SLEEP_PD_DIG BIT(0) //!< Deep sleep (power down digital domain)

1
components/soc/esp32/include/soc/rtc_cntl_reg.h
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@@ -1066,6 +1066,7 @@
#define RTC_CNTL_DBG_ATTEN_V 0x3
#define RTC_CNTL_DBG_ATTEN_S 24
#define RTC_CNTL_DBG_ATTEN_DEFAULT 3
#define RTC_CNTL_DBG_ATTEN_NODROP 0
#define RTC_CNTL_REG (DR_REG_RTCCNTL_BASE + 0x7c)
/* RTC_CNTL_FORCE_PU : R/W ;bitpos:[31] ;default: 1'd1 ; */
/*description: RTC_REG force power up*/