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	esp_rom: always inline cache.h functions for esp32
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		| @@ -65,7 +65,7 @@ void mmu_init(int cpu_no); | ||||
|   *                   4 : mmu table to be written is out of range | ||||
|   *                   5 : vaddr is out of range | ||||
|   */ | ||||
| static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr,  int psize, int num) | ||||
| static inline __attribute__((always_inline)) unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr,  int psize, int num) | ||||
| { | ||||
|     extern unsigned int cache_flash_mmu_set_rom(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr,  int psize, int num); | ||||
|  | ||||
| @@ -118,7 +118,7 @@ unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vadd | ||||
|   * | ||||
|   * @return None | ||||
|   */ | ||||
| static inline void IRAM_ATTR Cache_Read_Init(int cpu_no) | ||||
| static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Init(int cpu_no) | ||||
| { | ||||
|     extern void Cache_Read_Init_rom(int cpu_no); | ||||
|     DPORT_STALL_OTHER_CPU_START(); | ||||
| @@ -134,7 +134,7 @@ static inline void IRAM_ATTR Cache_Read_Init(int cpu_no) | ||||
|   * | ||||
|   * @return None | ||||
|   */ | ||||
| static inline void IRAM_ATTR Cache_Flush(int cpu_no) | ||||
| static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Flush(int cpu_no) | ||||
| { | ||||
|     extern void Cache_Flush_rom(int cpu_no); | ||||
|     DPORT_STALL_OTHER_CPU_START(); | ||||
| @@ -150,7 +150,7 @@ static inline void IRAM_ATTR Cache_Flush(int cpu_no) | ||||
|   * | ||||
|   * @return None | ||||
|   */ | ||||
| static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no) | ||||
| static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Disable(int cpu_no) | ||||
| { | ||||
|     extern void Cache_Read_Disable_rom(int cpu_no); | ||||
|     DPORT_STALL_OTHER_CPU_START(); | ||||
| @@ -166,7 +166,7 @@ static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no) | ||||
|   * | ||||
|   * @return None | ||||
|   */ | ||||
| static inline void IRAM_ATTR Cache_Read_Enable(int cpu_no) | ||||
| static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Enable(int cpu_no) | ||||
| { | ||||
|     extern void Cache_Read_Enable_rom(int cpu_no); | ||||
|     DPORT_STALL_OTHER_CPU_START(); | ||||
|   | ||||
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	 Alexey Lapshin
					Alexey Lapshin