alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-21 16:55:33 +00:00
Code Issues Packages Projects Releases Wiki Activity

soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one

Browse Source 
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
This commit is contained in:
SalimTerryLi
2021-08-23 14:03:23 +08:00
parent ed8df94915
commit 874a720286
205 changed files with 1439 additions and 3252 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
components/hal/esp32c3/include/hal/i2s_ll.h
View File

@@ -21,7 +21,9 @@
#pragma once
#include <stdbool.h>
#include "hal/misc.h"
#include "soc/i2s_periph.h"
#include "soc/i2s_struct.h"
#include "hal/i2s_types.h"
#ifdef __cplusplus
@@ -218,7 +220,7 @@ static inline void i2s_ll_tx_set_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
hw->tx_clkm_div_conf.tx_clkm_div_yn1 = 0;
}
}
hw->tx_clkm_conf.tx_clkm_div_num = set->mclk_div;
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->tx_clkm_conf, tx_clkm_div_num, set->mclk_div);
}
/**
@@ -257,7 +259,7 @@ static inline void i2s_ll_rx_set_clk(i2s_dev_t *hw, i2s_ll_clk_cal_t *set)
hw->rx_clkm_div_conf.rx_clkm_div_yn1 = 0;
}
}
hw->rx_clkm_conf.rx_clkm_div_num = set->mclk_div;
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->rx_clkm_conf, rx_clkm_div_num, set->mclk_div);
}
/**
@@ -500,7 +502,7 @@ static inline void i2s_ll_tx_enable_pdm(i2s_dev_t *hw, bool pdm_enable)
*/
static inline void i2s_ll_tx_set_pdm_prescale(i2s_dev_t *hw, bool prescale)
{
hw->tx_pcm2pdm_conf.tx_pdm_prescale = prescale;
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->tx_pcm2pdm_conf, tx_pdm_prescale, prescale);
}
/**