soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one

update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci

components/hal/esp32s3/include/hal/gpio_ll.h

@@ -28,6 +28,7 @@
 #include "soc/rtc_io_reg.h"
 #include "soc/usb_serial_jtag_reg.h"
 #include "hal/gpio_types.h"
+#include "soc/gpio_struct.h"
 
 #ifdef __cplusplus
 extern "C" {