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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci
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@@ -27,6 +27,7 @@
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#include "esp_attr.h"
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#include "esp_types.h"
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#include "soc/spi_periph.h"
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#include "soc/spi_struct.h"
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#include "soc/lldesc.h"
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#include "hal/assert.h"
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#include "hal/misc.h"
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@@ -915,13 +916,13 @@ static inline void spi_ll_set_command(spi_dev_t *hw, uint16_t cmd, int cmdlen, b
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{
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if (lsbfirst) {
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// The output command start from bit0 to bit 15, kept as is.
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hw->user2.usr_command_value = cmd;
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->user2, usr_command_value, cmd);
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} else {
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/* Output command will be sent from bit 7 to 0 of command_value, and
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* then bit 15 to 8 of the same register field. Shift and swap to send
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* more straightly.
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*/
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hw->user2.usr_command_value = HAL_SPI_SWAP_DATA_TX(cmd, cmdlen);
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->user2, usr_command_value, HAL_SPI_SWAP_DATA_TX(cmd, cmdlen));
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}
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}
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@@ -938,7 +939,7 @@ static inline void spi_ll_set_command(spi_dev_t *hw, uint16_t cmd, int cmdlen, b
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static inline void spi_ll_set_dummy(spi_dev_t *hw, int dummy_n)
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{
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hw->user.usr_dummy = dummy_n ? 1 : 0;
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hw->user1.usr_dummy_cyclelen = dummy_n - 1;
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HAL_FORCE_MODIFY_U32_REG_FIELD(hw->user1, usr_dummy_cyclelen, dummy_n - 1);
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}
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/**
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