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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one

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update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
This commit is contained in:
SalimTerryLi
2021-08-23 14:03:23 +08:00
parent ed8df94915
commit 874a720286
205 changed files with 1439 additions and 3252 deletions
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10
components/soc/esp32h2/include/soc/systimer_struct.h
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@@ -88,6 +88,7 @@ typedef union {
* update timer_unit0
*/
uint32_t timer_unit_update: 1;
uint32_t reserved31: 1;
};
uint32_t val;
} systimer_unit_op_reg_t;
@@ -102,6 +103,7 @@ typedef struct {
* timer unit load high 32 bit
*/
uint32_t timer_unit_load_hi: 20;
uint32_t reserved20: 12;
};
uint32_t val;
} hi;
@@ -126,6 +128,7 @@ typedef struct {
* timer target high 32 bit
*/
uint32_t timer_target_hi: 20;
uint32_t reserved20: 12;
};
uint32_t val;
} hi;
@@ -172,6 +175,7 @@ typedef struct {
* timer read value high 20bit
*/
uint32_t timer_unit_value_hi: 20;
uint32_t reserved20: 12;
};
uint32_t val;
} hi;
@@ -195,6 +199,7 @@ typedef union {
* timer comp load value
*/
uint32_t timer_comp_load: 1;
uint32_t reserved1: 31;
};
uint32_t val;
} systimer_comp_load_reg_t;
@@ -208,6 +213,7 @@ typedef union {
* timer unit load value
*/
uint32_t timer_unit_load: 1;
uint32_t reserved1: 31;
};
uint32_t val;
} systimer_unit_load_reg_t;
@@ -230,6 +236,7 @@ typedef union {
* interupt2 enable
*/
uint32_t target2_int_ena: 1;
uint32_t reserved3: 29;
};
uint32_t val;
} systimer_int_ena_reg_t;
@@ -251,6 +258,7 @@ typedef union {
* interupt2 raw
*/
uint32_t target2_int_raw: 1;
uint32_t reserved3: 29;
};
uint32_t val;
} systimer_int_raw_reg_t;
@@ -272,6 +280,7 @@ typedef union {
* interupt2 clear
*/
uint32_t target2_int_clr: 1;
uint32_t reserved3: 29;
};
uint32_t val;
} systimer_int_clr_reg_t;
@@ -293,6 +302,7 @@ typedef union {
* reg_target2_int_st
*/
uint32_t target2_int_st: 1;
uint32_t reserved3: 29;
};
uint32_t val;
} systimer_int_st_reg_t;