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Merge branch 'feature/docs_partition_ota_flash' into 'master'
Partition/SPI/OTA docs & OTA new functionality * Update partition, SPI flash & OTA docs to reflect functionality changes * Refactor OTA implementation to perform checks mentioned in API doc * Add new functions to OTA API: esp_ota_get_running_partition() & esp_ota_get_next_update_partition() functions * Add spi_flash_cache2phys() & spi_flash_phys2cache() functions to support esp_ota_get_running_partition() See merge request !513
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@@ -74,16 +74,23 @@ static uint32_t s_mmap_last_handle = 0;
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static void IRAM_ATTR spi_flash_mmap_init()
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{
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if (s_mmap_page_refcnt[0] != 0) {
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return; /* mmap data already initialised */
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}
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for (int i = 0; i < REGIONS_COUNT * PAGES_PER_REGION; ++i) {
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uint32_t entry_pro = DPORT_PRO_FLASH_MMU_TABLE[i];
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uint32_t entry_app = DPORT_APP_FLASH_MMU_TABLE[i];
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if (entry_pro != entry_app) {
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// clean up entries used by boot loader
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entry_pro = 0;
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DPORT_PRO_FLASH_MMU_TABLE[i] = 0;
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entry_pro = INVALID_ENTRY_VAL;
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DPORT_PRO_FLASH_MMU_TABLE[i] = INVALID_ENTRY_VAL;
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}
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if ((entry_pro & 0x100) == 0 && (i == 0 || i == PRO_IRAM0_FIRST_USABLE_PAGE || entry_pro != 0)) {
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if ((entry_pro & INVALID_ENTRY_VAL) == 0 && (i == 0 || i == PRO_IRAM0_FIRST_USABLE_PAGE || entry_pro != 0)) {
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s_mmap_page_refcnt[i] = 1;
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} else {
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DPORT_PRO_FLASH_MMU_TABLE[i] = INVALID_ENTRY_VAL;
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DPORT_APP_FLASH_MMU_TABLE[i] = INVALID_ENTRY_VAL;
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}
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}
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}
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@@ -108,9 +115,7 @@ esp_err_t IRAM_ATTR spi_flash_mmap(size_t src_addr, size_t size, spi_flash_mmap_
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did_flush = spi_flash_ensure_unmodified_region(src_addr, size);
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if (s_mmap_page_refcnt[0] == 0) {
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spi_flash_mmap_init();
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}
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spi_flash_mmap_init();
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// figure out the memory region where we should look for pages
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int region_begin; // first page to check
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int region_size; // number of pages to check
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@@ -139,7 +144,7 @@ esp_err_t IRAM_ATTR spi_flash_mmap(size_t src_addr, size_t size, spi_flash_mmap_
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int pos;
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for (pos = start; pos < start + page_count; ++pos, ++page) {
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int table_val = (int) DPORT_PRO_FLASH_MMU_TABLE[pos];
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uint8_t refcnt = s_mmap_page_refcnt[pos];
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uint8_t refcnt = s_mmap_page_refcnt[pos];
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if (refcnt != 0 && table_val != page) {
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break;
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}
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@@ -229,9 +234,7 @@ void IRAM_ATTR spi_flash_munmap(spi_flash_mmap_handle_t handle)
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void spi_flash_mmap_dump()
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{
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if (s_mmap_page_refcnt[0] == 0) {
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spi_flash_mmap_init();
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}
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spi_flash_mmap_init();
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mmap_entry_t* it;
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for (it = LIST_FIRST(&s_mmap_entries_head); it != NULL; it = LIST_NEXT(it, entries)) {
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printf("handle=%d page=%d count=%d\n", it->handle, it->page, it->count);
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@@ -305,3 +308,62 @@ static inline IRAM_ATTR bool update_written_pages(size_t start_addr, size_t leng
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}
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return false;
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}
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uint32_t spi_flash_cache2phys(const void *cached)
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{
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intptr_t c = (intptr_t)cached;
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size_t cache_page;
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if (c >= VADDR1_START_ADDR && c < VADDR1_FIRST_USABLE_ADDR) {
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/* IRAM address, doesn't map to flash */
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return SPI_FLASH_CACHE2PHYS_FAIL;
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}
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else if (c < VADDR1_FIRST_USABLE_ADDR) {
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/* expect cache is in DROM */
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cache_page = (c - VADDR0_START_ADDR) / SPI_FLASH_MMU_PAGE_SIZE;
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} else {
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/* expect cache is in IROM */
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cache_page = (c - VADDR1_START_ADDR) / SPI_FLASH_MMU_PAGE_SIZE + 64;
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}
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if (cache_page >= 256) {
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/* cached address was not in IROM or DROM */
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return SPI_FLASH_CACHE2PHYS_FAIL;
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}
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uint32_t phys_page = DPORT_PRO_FLASH_MMU_TABLE[cache_page];
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if (phys_page == INVALID_ENTRY_VAL) {
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/* page is not mapped */
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return SPI_FLASH_CACHE2PHYS_FAIL;
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}
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uint32_t phys_offs = phys_page * SPI_FLASH_MMU_PAGE_SIZE;
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return phys_offs | (c & (SPI_FLASH_MMU_PAGE_SIZE-1));
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}
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const void *spi_flash_phys2cache(uint32_t phys_offs, spi_flash_mmap_memory_t memory)
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{
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uint32_t phys_page = phys_offs / SPI_FLASH_MMU_PAGE_SIZE;
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int start, end, page_delta;
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intptr_t base;
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if (memory == SPI_FLASH_MMAP_DATA) {
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start = 0;
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end = 64;
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base = VADDR0_START_ADDR;
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page_delta = 0;
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} else {
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start = PRO_IRAM0_FIRST_USABLE_PAGE;
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end = 256;
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base = VADDR1_START_ADDR;
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page_delta = 64;
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}
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for (int i = start; i < end; i++) {
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if (DPORT_PRO_FLASH_MMU_TABLE[i] == phys_page) {
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i -= page_delta;
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intptr_t cache_page = base + (SPI_FLASH_MMU_PAGE_SIZE * i);
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return (const void *) (cache_page | (phys_offs & (SPI_FLASH_MMU_PAGE_SIZE-1)));
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}
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}
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return NULL;
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}
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