mirror of
https://github.com/espressif/esp-idf.git
synced 2025-11-02 05:36:31 +00:00
spi: add enum for spi dma channels
This commit is contained in:
@@ -164,8 +164,7 @@ static inline periph_module_t get_dma_periph(int dma_chan)
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#endif
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}
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//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
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static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
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static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_dma_chan)
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{
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bool ret = false;
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@@ -174,8 +173,7 @@ static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_tx_dma_c
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if (!is_used) {
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spi_dma_chan_enabled |= BIT(dma_chan);
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periph_module_enable(get_dma_periph(dma_chan));
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*out_actual_tx_dma_chan = dma_chan;
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*out_actual_rx_dma_chan = dma_chan;
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*out_actual_dma_chan = dma_chan;
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ret = true;
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}
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portEXIT_CRITICAL(&spi_dma_spinlock);
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@@ -192,34 +190,39 @@ static void spicommon_connect_spi_and_dma(spi_host_device_t host, int dma_chan)
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#endif
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}
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static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
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static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
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{
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assert(is_valid_host(host_id));
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#if CONFIG_IDF_TARGET_ESP32
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assert((dma_chan > 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN);
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assert(dma_chan > SPI_DMA_DISABLED && dma_chan <= SPI_DMA_CH_AUTO);
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#elif CONFIG_IDF_TARGET_ESP32S2
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assert(dma_chan == host_id || dma_chan == DMA_AUTO_CHAN);
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assert(dma_chan == (int)host_id || dma_chan == SPI_DMA_CH_AUTO);
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#endif
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esp_err_t ret = ESP_OK;
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bool success = false;
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uint32_t actual_dma_chan = 0;
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if (dma_chan == DMA_AUTO_CHAN) {
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if (dma_chan == SPI_DMA_CH_AUTO) {
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#if CONFIG_IDF_TARGET_ESP32
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for (int i = 1; i < SOC_SPI_DMA_CHAN_NUM+1; i++) {
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success = spicommon_dma_chan_claim(i, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
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success = spicommon_dma_chan_claim(i, &actual_dma_chan);
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if (success) {
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break;
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}
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}
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#elif CONFIG_IDF_TARGET_ESP32S2
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//On ESP32S2, each SPI controller has its own DMA channel
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success = spicommon_dma_chan_claim(host_id, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
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success = spicommon_dma_chan_claim(host_id, &actual_dma_chan);
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#endif //#if CONFIG_IDF_TARGET_XXX
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} else if (dma_chan > 0) {
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success = spicommon_dma_chan_claim(dma_chan, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
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} else {
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success = spicommon_dma_chan_claim((int)dma_chan, &actual_dma_chan);
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}
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//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
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*out_actual_tx_dma_chan = actual_dma_chan;
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*out_actual_rx_dma_chan = actual_dma_chan;
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if (!success) {
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SPI_CHECK(false, "no available dma channel", ESP_ERR_NOT_FOUND);
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}
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@@ -230,15 +233,15 @@ static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_cha
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}
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#else //SOC_GDMA_SUPPORTED
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static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
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static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
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{
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assert(is_valid_host(host_id));
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assert(dma_chan == DMA_AUTO_CHAN);
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assert(dma_chan == SPI_DMA_CH_AUTO);
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esp_err_t ret = ESP_OK;
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spicommon_bus_context_t *ctx = bus_ctx[host_id];
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if (dma_chan == DMA_AUTO_CHAN) {
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if (dma_chan == SPI_DMA_CH_AUTO) {
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gdma_channel_alloc_config_t tx_alloc_config = {
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.flags.reserve_sibling = 1,
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.direction = GDMA_CHANNEL_DIRECTION_TX,
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@@ -275,10 +278,14 @@ static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_cha
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}
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#endif //#if !SOC_GDMA_SUPPORTED
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esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
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esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, spi_dma_chan_t dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
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{
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assert(is_valid_host(host_id));
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assert((dma_chan == 1 || dma_chan == 2 || dma_chan == DMA_AUTO_CHAN));
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#if CONFIG_IDF_TARGET_ESP32
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assert(dma_chan > SPI_DMA_DISABLED && dma_chan <= SPI_DMA_CH_AUTO);
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#elif CONFIG_IDF_TARGET_ESP32S2
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assert(dma_chan == (int)host_id || dma_chan == SPI_DMA_CH_AUTO);
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#endif
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esp_err_t ret = ESP_OK;
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uint32_t actual_tx_dma_chan = 0;
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@@ -608,7 +615,7 @@ spi_bus_lock_handle_t spi_bus_lock_get_by_id(spi_host_device_t host_id)
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}
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//----------------------------------------------------------master bus init-------------------------------------------------------//
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esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, int dma_chan)
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esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, spi_dma_chan_t dma_chan)
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{
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esp_err_t err = ESP_OK;
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spicommon_bus_context_t *ctx = NULL;
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@@ -619,11 +626,11 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
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SPI_CHECK(is_valid_host(host_id), "invalid host_id", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_ctx[host_id] == NULL, "SPI bus already initialized.", ESP_ERR_INVALID_STATE);
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#ifdef CONFIG_IDF_TARGET_ESP32
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SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
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SPI_CHECK(dma_chan >= SPI_DMA_DISABLED && dma_chan <= SPI_DMA_CH_AUTO, "invalid dma channel", ESP_ERR_INVALID_ARG );
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#elif CONFIG_IDF_TARGET_ESP32S2
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SPI_CHECK( dma_chan == 0 || dma_chan == host_id || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
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SPI_CHECK( dma_chan == SPI_DMA_DISABLED || dma_chan == (int)host_id || dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel", ESP_ERR_INVALID_ARG );
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#elif SOC_GDMA_SUPPORTED
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SPI_CHECK( dma_chan == 0 || dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
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SPI_CHECK( dma_chan == SPI_DMA_DISABLED || dma_chan == SPI_DMA_CH_AUTO, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
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#endif
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SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG);
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#ifndef CONFIG_SPI_MASTER_ISR_IN_IRAM
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@@ -644,7 +651,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
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bus_attr = &ctx->bus_attr;
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bus_attr->bus_cfg = *bus_config;
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if (dma_chan != 0) {
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if (dma_chan != SPI_DMA_DISABLED) {
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bus_attr->dma_enabled = 1;
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err = spicommon_dma_chan_alloc(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
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