Merge branch 'feat/support_gdma_on_h4' into 'master'

feat(gdma): support gdma on esp32h4

Closes IDF-12382

See merge request espressif/esp-idf!38340
This commit is contained in:
Chen Ji Chang
2025-04-17 11:34:56 +08:00
20 changed files with 1291 additions and 356 deletions

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@@ -7,10 +7,22 @@ config SOC_UART_SUPPORTED
bool
default y
config SOC_GDMA_SUPPORTED
bool
default y
config SOC_AHB_GDMA_SUPPORTED
bool
default y
config SOC_GPTIMER_SUPPORTED
bool
default y
config SOC_ASYNC_MEMCPY_SUPPORTED
bool
default y
config SOC_EFUSE_KEY_PURPOSE_FIELD
bool
default y
@@ -139,6 +151,30 @@ config SOC_CPU_HAS_LOCKUP_RESET
bool
default y
config SOC_DMA_CAN_ACCESS_FLASH
bool
default y
config SOC_AHB_GDMA_VERSION
int
default 2
config SOC_GDMA_NUM_GROUPS_MAX
int
default 1
config SOC_GDMA_PAIRS_PER_GROUP_MAX
int
default 5
config SOC_GDMA_SUPPORT_SLEEP_RETENTION
bool
default y
config SOC_AHB_GDMA_SUPPORT_PSRAM
bool
default y
config SOC_GPIO_PORT
int
default 1
@@ -371,6 +407,10 @@ config SOC_FLASH_ENCRYPTION_XTS_AES_128
bool
default y
config SOC_APM_CTRL_FILTER_SUPPORTED
bool
default y
config SOC_UART_NUM
int
default 2

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@@ -3,3 +3,34 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
// The following macros have a format SOC_[periph][instance_id] to make it work with `GDMA_MAKE_TRIGGER`
#define SOC_GDMA_TRIG_PERIPH_M2M0 (-1)
#define SOC_GDMA_TRIG_PERIPH_SPI3 (0)
#define SOC_GDMA_TRIG_PERIPH_SPI2 (1)
#define SOC_GDMA_TRIG_PERIPH_UHCI0 (2)
#define SOC_GDMA_TRIG_PERIPH_I2S0 (3)
#define SOC_GDMA_TRIG_PERIPH_AES0 (4)
#define SOC_GDMA_TRIG_PERIPH_ASRC0 (5)
#define SOC_GDMA_TRIG_PERIPH_ASRC1 (6)
#define SOC_GDMA_TRIG_PERIPH_SHA0 (7)
#define SOC_GDMA_TRIG_PERIPH_ADC0 (8)
#define SOC_GDMA_TRIG_PERIPH_PARLIO0 (9)
// On which system bus is the DMA instance of the peripheral connection mounted
#define SOC_GDMA_BUS_ANY (-1)
#define SOC_GDMA_BUS_AHB (0)
#define SOC_GDMA_TRIG_PERIPH_M2M0_BUS SOC_GDMA_BUS_ANY
#define SOC_GDMA_TRIG_PERIPH_SPI3_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_SPI2_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_UHCI0_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_I2S0_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_AES0_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_ASRC0_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_ASRC1_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_SHA0_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_ADC0_BUS SOC_GDMA_BUS_AHB
#define SOC_GDMA_TRIG_PERIPH_PARLIO0_BUS SOC_GDMA_BUS_AHB

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@@ -29,8 +29,8 @@
// #define SOC_ANA_CMPR_SUPPORTED 1 // TODO: [ESP32H4] IDF-12395 big change!!
// #define SOC_DEDICATED_GPIO_SUPPORTED 1 // TODO: [ESP32H4] IDF-12401
#define SOC_UART_SUPPORTED 1 // TODO: [ESP32H4] IDF-12398
// #define SOC_GDMA_SUPPORTED 1 // TODO: [ESP32H4] IDF-12382
// #define SOC_AHB_GDMA_SUPPORTED 1 // TODO: [ESP32H4] IDF-12382
#define SOC_GDMA_SUPPORTED 1
#define SOC_AHB_GDMA_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
// #define SOC_PCNT_SUPPORTED 1 // TODO: [ESP32H4] IDF-12338
// #define SOC_MCPWM_SUPPORTED 1 // TODO: [ESP32H4] IDF-12380
@@ -39,7 +39,7 @@
// #define SOC_PARLIO_SUPPORTED 1 // TODO: [ESP32H4] IDF-12345 IDF-12347
// #define SOC_BT_SUPPORTED 1
// #define SOC_IEEE802154_SUPPORTED 1
// #define SOC_ASYNC_MEMCPY_SUPPORTED 1 // TODO: [ESP32H4] IDF-12382
#define SOC_ASYNC_MEMCPY_SUPPORTED 1
// #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 // TODO: [ESP32H4] IDF-12396
// #define SOC_TEMP_SENSOR_SUPPORTED 1 // TODO: [ESP32H4] IDF-12404
// #define SOC_SUPPORTS_SECURE_DL_MODE 1
@@ -177,11 +177,16 @@
See TRM DS chapter for more details */
// #define SOC_DS_KEY_CHECK_MAX_WAIT_US (1100)
/*-------------------------- DMA Common CAPS ----------------------------------------*/
#define SOC_DMA_CAN_ACCESS_FLASH 1 /*!< DMA can access Flash memory */
/*-------------------------- GDMA CAPS -------------------------------------*/
// #define SOC_AHB_GDMA_VERSION 1U
// #define SOC_GDMA_NUM_GROUPS_MAX 1U
// #define SOC_GDMA_PAIRS_PER_GROUP_MAX 4
// #define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule
#define SOC_AHB_GDMA_VERSION 2
#define SOC_GDMA_NUM_GROUPS_MAX 1U
#define SOC_GDMA_PAIRS_PER_GROUP_MAX 5
// #define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule TODO: [ESP32H4] IDF-12383
#define SOC_GDMA_SUPPORT_SLEEP_RETENTION 1
#define SOC_AHB_GDMA_SUPPORT_PSRAM 1
/*-------------------------- ETM CAPS --------------------------------------*/
// #define SOC_ETM_GROUPS 1U // Number of ETM groups
@@ -471,6 +476,9 @@
#define SOC_FLASH_ENCRYPTION_XTS_AES 1
#define SOC_FLASH_ENCRYPTION_XTS_AES_128 1
/*-------------------------- APM CAPS ----------------------------------------*/
#define SOC_APM_CTRL_FILTER_SUPPORTED 1 /*!< Support for APM control filter */
/*------------------------ Anti DPA (Security) CAPS --------------------------*/
// #define SOC_CRYPTO_DPA_PROTECTION_SUPPORTED 1